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Added 7 mins ago
GC
Développeur(euse) de logiciels sénior | Senior Software Developer
Game Companies
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- Full-time
En plus de notre éditeur et de notre moteur, Unity propose diverses solutions pour concevoir des jeux et des expériences 3D enrichies par des données en temps réel. Notre équipe, Unity…
Added 7 mins ago
GC
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- $110,000 to $150,000 CAD / year
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- $110,000 to $150,000 CAD / year
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Added 22 mins ago
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Added 22 mins ago
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Added 22 mins ago
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- $115,000 to $150,000 CAD / year
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Added 22 mins ago
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- $115,000 to $150,000 CAD / year
- Full-time
At Jacobs, we're challenging today to reinvent tomorrow by delivering sustainable infrastructure solutions that improve the quality of life in our communities. We have an exciting…
Added 22 mins ago
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Project Manager - Drinking Water
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- $115,000 to $150,000 CAD / year
- Full-time
At Jacobs, we're challenging today to reinvent tomorrow by delivering sustainable infrastructure solutions that improve the quality of life in our communities. We have an exciting…
Added 1 hour ago
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- Full-time
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Added 1 hour ago
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Added 1 hour ago
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Added 1 hour ago
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The Test Engineer supports new product introduction and manufacturing test for fiber optic la equipment. This role sits alongside R&D while owning manufacturing-focused test activities…
Added 1 hour ago
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Added 1 hour ago
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FPGA Design Engineer
Actalent
Ottawa, ON
- $65 to $85 CAD / hour
- Full-time
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Added 1 hour ago
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Added 1 hour ago
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Added 1 hour ago
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Added 1 hour ago
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- Full-time
Depuis 1987, EDF solutions électriques fournit des solutions d'énergie propre aux États-Unis, au Canada et au Mexique. Nous sommes un producteur d'énergie indépendant et un fournisseur de…
Added 2 hours ago
MU
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Actalent

FPGA Design Engineer

Ottawa, ON, Canada

$65 to $85 CAD / hour · Full-time

Apply on LinkedIn About employer

Applications open in a new tab.

Job details

Pay: $65 to $85 CAD / hour
Job type: Full-time
Apply by: Dec 9, 2026
Experience: 5+ years of ASIC/FPGA Design experience
Posting language: English · French
Posted: Nov 9, 2026

Original job description

English section of this bilingual listing.

Job Title: FPGA Design Engineer

Job Description

You will work with Xilinx devices, SystemVerilog, and Cadence simulation tools to implement, verify, and refine FPGA logic, combining reuse of existing modules with targeted development from scratch. The scope of your work will align with your experience level, ranging from extensive new logic creation for more experienced engineers to focused development and enhancement of existing designs for those earlier in their careers.

Responsibilities

Design and implement FPGA logic using Xilinx devices, leveraging existing components and creating new modules where needed.
Develop, maintain, and refine RTL code in SystemVerilog for complex digital designs.
Use Cadence tools to run simulations, analyze results, and validate FPGA functionality.
Modify existing test cases to cover new features and design changes, ensuring thorough verification.
Debug FPGA designs by identifying, analyzing, and resolving functional and timing issues.
Collaborate with other FPGA designers and expert verification engineers to define requirements, review designs, and improve overall platform quality.
Contribute to feature additions and new platform variants that support an optical switch and multiple digital interfaces.
Apply good digital design practices, including modular design, code reuse, and clear documentation.
Interface with related hardware components such as DACs, ADCs, external memories, and multiplexers using vendor IP where appropriate.
Support synthesis, timing constraints, and timing analysis activities when required to meet performance and reliability targets.

Essential Skills

5+ years of ASIC/FPGA Design experience
Strong proficiency in SystemVerilog for digital design and verification.
Experience with synthesis, timing constraints, and timing analysis for FPGA designs.
Hands-on experience using Cadence tools for FPGA simulation.
Familiarity with simulation environments and the ability to work within existing simulation frameworks.
Practical experience with design debug, including analyzing simulation results and resolving functional issues.

Additional Skills & Qualifications

Knowledge of VHDL for digital design and maintenance of legacy or mixed-language code bases.
Familiarity with Xilinx Vivado or similar FPGA development tools.
Exposure to scripting (for example, Python) to automate design, simulation, or verification tasks.
Experience with C or C++ for firmware or low-level software that interfaces with FPGA logic.
Experience in DSP or high-speed digital design.
Understanding of PCIe and other high-speed interfaces implemented on FPGA platforms.
Experience working with DACs, ADCs, external memories, and multiplexers, including use of vendor IP cores.

Job Type & Location

This is a Contract to Hire position based out of Ottawa, ON.

Pay And Benefits

The pay range for this position is $65.00 - $85.00/hr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Job Type & Location

This is a Contract to Hire position based out of Ottawa, ON.

Workplace Type

This is a fully onsite position in Ottawa,ON.

À propos d'Actalent

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email actalentaccommodation@actalentservices.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Use of Artificial Intelligence (AI):We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.

Read the full bilingual original

Design and implement FPGA logic using Xilinx devices, leveraging existing components and creating new modules where needed.
Develop, maintain, and refine RTL code in SystemVerilog for complex digital designs.
Use Cadence tools to run simulations, analyze results, and validate FPGA functionality.
Modify existing test cases to cover new features and design changes, ensuring thorough verification.
Debug FPGA designs by identifying, analyzing, and resolving functional and timing issues.
Collaborate with other FPGA designers and expert verification engineers to define requirements, review designs, and improve overall platform quality.
Contribute to feature additions and new platform variants that support an optical switch and multiple digital interfaces.
Apply good digital design practices, including modular design, code reuse, and clear documentation.
Interface with related hardware components such as DACs, ADCs, external memories, and multiplexers using vendor IP where appropriate.
Support synthesis, timing constraints, and timing analysis activities when required to meet performance and reliability targets.

Essential Skills

5+ years of ASIC/FPGA Design experience
Strong proficiency in SystemVerilog for digital design and verification.
Experience with synthesis, timing constraints, and timing analysis for FPGA designs.
Hands-on experience using Cadence tools for FPGA simulation.
Familiarity with simulation environments and the ability to work within existing simulation frameworks.
Practical experience with design debug, including analyzing simulation results and resolving functional issues.

Additional Skills & Qualifications

Knowledge of VHDL for digital design and maintenance of legacy or mixed-language code bases.
Familiarity with Xilinx Vivado or similar FPGA development tools.
Exposure to scripting (for example, Python) to automate design, simulation, or verification tasks.
Experience with C or C++ for firmware or low-level software that interfaces with FPGA logic.
Experience in DSP or high-speed digital design.
Understanding of PCIe and other high-speed interfaces implemented on FPGA platforms.
Experience working with DACs, ADCs, external memories, and multiplexers, including use of vendor IP cores.

Job Type & Location

This is a Contract to Hire position based out of Ottawa, ON.

Pay And Benefits

The pay range for this position is $65.00 - $85.00/hr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Job Type & Location

This is a Contract to Hire position based out of Ottawa, ON.

Workplace Type

This is a fully onsite position in Ottawa,ON.

À propos d'Actalent

Actalent est un leader mondial dans les services dingénierie et de sciences ainsi que dans les solutions de talents. Nous aidons des entreprises visionnaires à faire progresser leurs initiatives dingénierie et de science grâce à laccès à des experts spécialisés qui favorisent léchelle, linnovation et la rapidité de mise sur le marché. Avec un réseau de près de 20 000 consultants et 5 000 clients à travers les États-Unis, le Canada, lAsie et lEurope, Actalent dessert de nombreuses entreprises du Fortune 500. Nous sommes fiers dêtre lune des 500 meilleures firmes de conception de lEngineering News-Record (ENR) pour nos services de conception en ingénierie et un lauréat du prix ClearlyRated Best of Staffing® tant pour le service client que pour les talents.

Actalent est un employeur souscrivant au principe de légalité des chances et accepte toutes les candidatures sans tenir compte de la race, du sexe, de lâge, de la couleur, de la religion, des origines nationales, du statut dancien combattant, dun handicap, de lorientation sexuelle, de lidentité sexuelle, des renseignements génétiques ou de toute autre caractéristique protégée par la loi.

Si vous souhaitez faire une demande daccommodement raisonnable, tel que la modification ou lajustement du processus de demande demploi ou dentrevue à cause dun handicap, veuillez envoyer un courriel à actalentaccommodation@actalentservices.com pour connaître dautres options daccommodement.

Ordonnance sur légalité des chances de San Francisco: Conformément à lOrdonnance sur légalité des chances de San Francisco, pour tous les postes situés dans la ville et le comté de San Francisco, nous examinerons les candidatures des personnes qualifiées ayant un casier judiciaire ou des antécédents criminels.

Utilisation de lintelligence artificielle (IA): Nous pouvons utiliser lintelligence artificielle (IA) pour soutenir certaines étapes de notre processus dembauche, notamment la recherche, la présélection et lévaluation des candidatures. LIA aide à analyser les candidatures et les qualifications, mais les décisions finales sont prises par notre équipe de recrutement. En soumettant votre candidature, vous reconnaissez et acceptez que celle-ci puisse être examinée à laide doutils dIA.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email actalentaccommodation@actalentservices.com for other accommodation options.

San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Use of Artificial Intelligence (AI):We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.

Apply on LinkedIn About employer

More about this job

Responsibilities

Design, implement, verify, and debug FPGA logic using Xilinx devices, SystemVerilog, and Cadence simulation tools, while developing new modules and refining existing designs. Collaborate with designers and verification engineers to add platform features, interface with hardware components, and support synthesis and timing analysis.

Requirements

Requires at least five years of ASIC/FPGA design experience, strong SystemVerilog skills, and hands-on experience with Cadence simulation, FPGA synthesis, timing constraints, and timing analysis. Practical simulation-based debugging experience is essential; VHDL, Vivado, scripting, C/C++, DSP, PCIe, and hardware interface experience are additional qualifications.

Skills

FPGA Design
SystemVerilog
Xilinx Devices
Cadence Simulation Tools
RTL Development
FPGA Verification
Synthesis
Timing Constraints
Timing Analysis
Design Debugging
VHDL
Vivado
Python Scripting
DSP
High-Speed Digital Design
PCIe

Visa sponsorship

Not detected in the job text

Keywords

FPGA
ASIC
Xilinx
SystemVerilog
RTL
Cadence
Simulation
Verification
Synthesis
Timing Constraints
Timing Analysis
VHDL
Vivado
Python
C
C++
DSP
PCIe
High-Speed Interfaces
DAC
ADC
External Memory
Multiplexers
Vendor IP Cores
Digital Design
Optical Switch
Test Cases
Design Debugging

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