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Added 1 hour ago
Senior Software Engineer - React (Platform UI)
Ping Identity
Vancouver, BC
Full-time
We are looking for a highly motivated Senior Software Engineer to join our Platform UI team to build web applications for the next generation Identity platform. This role requires a…
Added 1 hour ago
Software Engineer II - Platform UI (React)
Ping Identity
Vancouver, BC
Full-time
We are looking for a highly motivated Software Engineer II to join our Platform UI team to build web applications for the next generation Identity platform. This role requires a developer…
Added 4 hours ago
Firmware Engineer
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Toronto, ON
Full-time
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Added 11 hours ago
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Contract
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Toronto, ON
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Senior Data Engineer - Zonda - Toronto, ON
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Toronto, ON
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Advanced Micro Devices, Inc

Lead Validation Engineer - Data Center GPU

1 Commerce Valley Drive, Markham, ON, L3T 7X6, Canada

Job type: Full-time
Apply by: Sep 18, 2027
Posting language: English
Posted: Sep 18, 2026

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Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

As an Lead Domain Validation Engineer in the Data Center and GPU Accelerated Processing Division, you will drive IP domain and power-management validation for AMD Data Center GPU products across pre-silicon, bring-up, post-silicon enablement, and system-level debug. You will own key areas of validation strategy and execution while partnering with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to deliver high-quality next-generation AI and HPC products.

THE PERSON:

The ideal candidate is a motivated technical leader with strong experience in SoC domain validation, hardware features, firmware interactions, subsystem communication, and system-level debug. You can independently drive validation planning, issue triage, root-cause analysis, and closure while influencing cross-functional teams, mentoring engineers, and communicating clearly with technical and program stakeholders.

KEY RESPONSIBILITIES:

Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases.

Develop validation plans for SMU sub-blocks and power-management features, including bootcode, clocking, fuse, SMN, SMUIO, thermal, RSMU, security-related interactions, and other system-management functions.

Lead debug triage, root-cause analysis, and issue closure across hardware, firmware, platform, diagnostics, and system-level interactions.

Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams to align scope, risks, dependencies, and exit criteria.

Build and improve automation, validation content, debug-analysis scripts, and regression checks to improve coverage, efficiency, and repeatability.

Review RTL, specifications, firmware interfaces, register maps, and validation collateral to identify coverage gaps and improve validation effectiveness.

Support lab-based and system-level debug using platform tools, firmware logs, register-level analysis, and standard measurement equipment.

Support customer and sustaining issues by providing SMU technical expertise, debug guidance, and issue-resolution support.

Mentor engineers and help improve team validation methodology, debug practices, and product quality.

PREFERRED EXPERIENCE:

Strong experience in semiconductor validation, silicon bring-up, SoC validation, firmware validation, or hardware/software integration.

Hands-on experience with power-management validation, SMU/PMFW functionality, SoC control fabrics, clocking, reset, fuse, thermal, voltage-regulator, or platform-management features.

Experience developing validation plans, test content, automation, and debug methodologies for complex SoC or GPU products.

Strong debug skills across hardware, firmware, software, diagnostics, and platform interactions.

Experience with emulation, simulation, or FPGA/prototyping environments.

Proficiency in Python and C/C++ for automation, test infrastructure, or debug-analysis tools.

Familiarity with Linux, lab bring-up, register-level debug, firmware logs, and platform debug tools.

Ability to execute independently, manage priorities, influence cross-functional teams, and drive technical issues to closure.

ACADEMIC CREDENTIALS:

Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field preferred.

LOCATION:

Markham, ON

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

The Lead Validation Engineer will drive IP domain and power-management validation for Data Center GPU products across pre-silicon, bring-up, and post-silicon phases. They will lead debug triage, develop validation plans, and partner with cross-functional teams to ensure high-quality AI and HPC product delivery.

Requirements

The ideal candidate possesses strong experience in semiconductor validation, silicon bring-up, and SoC domain validation. Proficiency in Python, C/C++, and system-level debug methodologies is required, along with a degree in Electrical Engineering, Computer Engineering, or Computer Science.

Skills

SoC Validation
Silicon Bring-up
Power-management Validation
Firmware Validation
System-level Debug
Python
C/C++
Emulation
FPGA Prototyping
SMU Hardware Validation
Data Center GPU
Hardware/Software Integration
Technical Leadership
Root-cause Analysis
Validation Planning

Visa sponsorship

Not detected in the job text

Keywords

SoC
GPU
Data Center
SMU
Power Management
Firmware
ASIC
Emulation
Python
C++
Linux
Validation
Debugging
AI
HPC
Hardware
Clocking
Thermal
Fuse
Register-level Debug
System-level Debug
Automation
Regression
Semiconductor
Silicon Bring-up
RTL
Diagnostics
Platform Management
Voltage Regulator
Technical Leadership

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