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Added 6 mins ago
MT
Senior Azure engineer
Manx Telecom Enterprise
Permanent North American Gaeltacht, ON
- Full-time
A strong focus on collaboration and continuous improvement is key. The Senior Azure Engineer will work with colleagues across engineering, security, and service teams to implement best…
Added 21 mins ago
DM
Chief Mine Engineer
Discovery Mining Ltd
South Porcupine, ON
- Full-time
…procedures for all members of the department, for the pursuit of continuous improvement opportunities of mine operations and for the management of site specific technical services workforce…
Added 21 mins ago
C
Manager Signals and Communication Operations
CPKC
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- Full-time
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Added 39 mins ago
Integration & Test Software Engineer
L3Harris Technologies
Montreal, QC
Contribute to continuous improvement of validation processes, including expanding automation coverage and efficiency.
Added 48 mins ago
C
Manager Operating Practices
CPKC
Calgary, AB
- Full-time
…incident investigations and compliance programs, and drives continuous improvement initiatives that enhance safety, reduce operational risk, and support business performance. Working…
Added 48 mins ago
R
Lead Engineer, Facility Design
Raise
Calgary, AB
- $150,000 to $165,000 CAD / year
- Full-time
…contribute to the advancement of engineering practices by supporting continuous improvement initiatives, modern technologies, and innovative solutions that enhance the reliability and…
Added 48 mins ago
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P&C Specialist Commissioning Engineer
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- $131,000 to $150,000 CAD / year
- Full-time
…deliverables in accordance with EGBC and standards * Contribute to continuous improvement of engineering processes, workflows, and quality practices * Identify risks and develop practical,…
Added 49 mins ago
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Product Development Engineer
Septodont
Bromont, QC
- Full-time
The company has an opening at its Design & Development Center located in Bromont, Quebec for a Product Development Engineer.
Added 49 mins ago
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Maintenance Manager
Septodont
Cambridge, ON
- Full-time
…technical activities, as well as leading technical engineering improvement projects, related to the maintenance of GMP manufacturing equipment and systems. Reporting to the Production…
Added 49 mins ago
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Process Specialist II /Engineer II
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Cambridge, ON
- Full-time
The Process Engineer/ Process Specialist II is accountable for project execution and process system support across the organization. This role supports manufacturing operations, capital…
Added 49 mins ago
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Controls Engineer
Federal Mfg
Oakville, ON · CA ON Oakville
- Full-time
Contribute to controls standards, design improvements, and continuous improvement initiatives.
Added 1 hour ago
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Principal Instrumentation Engineer
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Calgary, AB · Edmonton, AB · Vancouver, BC
- Full-time
Promote best practices and continuous improvement within the instrumentation discipline.
Added 1 hour ago
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Senior Sub-System Design Engineer
Ericsson
Ottawa, ON
- Full-time
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Added 1 hour ago
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QA Support Engineer
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Growth Mindset: Openness to mentorship and continuous skill improvement.
Added 1 hour ago
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Senior Engineer – Systems (Powerplant)
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Added 1 hour ago
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Director, Operational Excellence & Process Engineering
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Mississauga, ON
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…and ESS) sectors. This role will be responsible for driving continuous improvement, standardization, workforce productivity, and data-driven decision-making across a diverse portfolio of…
Added 1 hour ago
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mechanical design engineer
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- $50,000 to $65,000 CAD / year
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Added 1 hour ago
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Added 1 hour ago
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Added 2 hours ago
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Senior Engineer – Noise and Vibration
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Drive the continuous improvement of our processes to increase safety and efficiency.
Added 2 hours ago
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Added 2 hours ago
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Added 2 hours ago
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Senior Engineer – Performance
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Advanced Micro Devices, Inc

Principal ASIC Design Engineer

1 Commerce Valley Drive, Markham, ON, L3T 7X6, Canada

Full-time

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Job details

Job type: Full-time
Apply by: Oct 5, 2027
Posting language: English
Posted: Oct 5, 2026

Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE

The IOHUB team at AMD is seeking a Principal ASIC Design Engineer to provide technical leadership for the development of next-generation IP that enables AMD products across server, data center, client, and embedded markets. As a senior member of the team, you will help define and deliver innovative technologies that manage and optimize AI-driven data movement, enabling industry-leading performance, scalability, security, virtualization, and power efficiency.

In this role, you will collaborate with architecture, design, verification, firmware, implementation, and product teams across AMD to transform complex product requirements into robust silicon solutions. You will have the opportunity to influence technical strategy, drive architectural innovation, mentor engineers, and help shape engineering best practices that support AMD's future generations of AI and high-performance computing products.

THE PERSON

You are a collaborative and technically influential engineering leader who thrives in solving complex design challenges and driving execution across multidisciplinary teams. You combine strong architectural judgment with a practical, results-oriented approach to problem solving and are comfortable making decisions in ambiguous environments.

You are passionate about mentoring engineers, elevating technical quality, and promoting scalable design methodologies. You communicate effectively across organizations, build alignment among stakeholders, and demonstrate ownership in driving challenging technical issues to closure. You also embrace emerging technologies, including AI-enabled engineering tools, to enhance productivity, design quality, and development efficiency.

KEY RESPONSIBILITIES

Provide technical leadership and ownership for critical IOHUB IP development, ensuring successful execution from architecture through tape-out and post-silicon validation.
Partner with architecture teams to evaluate technical trade-offs, define requirements, and translate product objectives into scalable and high-quality design solutions.
Drive design quality and implementation readiness by ensuring designs meet functional, timing, area, power, security, and reliability goals.
Lead cross-functional collaboration among architecture, design, verification, firmware, physical design, and product teams to achieve program milestones and successful product delivery.
Identify technical risks, dependencies, and integration challenges early, and develop effective mitigation and execution strategies.
Establish and promote engineering best practices that improve design quality, reuse, efficiency, maintainability, and long-term scalability.
Mentor and guide engineers through architecture reviews, implementation challenges, debug activities, and technical decision-making processes.
Drive successful post-silicon bring-up, validation, and root-cause analysis activities to support product quality and continuous improvement.
Communicate technical direction, project status, risks, and key decisions effectively to engineering leadership and stakeholders across global teams.
Champion the adoption of innovative methodologies, including AI-assisted workflows and automation, to enhance engineering effectiveness and development velocity.

PREFERRED EXPERIENCE

Proven track record of leading significant ASIC or silicon design contributions through multiple successful product tape-outs.
Deep expertise in RTL design, microarchitecture development, and complex IP design within advanced SoC environments.
Experience developing high-performance designs that address power, performance, security, scalability, and virtualization requirements.
Strong understanding of industry-standard simulation, lint, CDC, RDC, formal verification, static analysis, synthesis, and timing closure methodologies.
Experience collaborating across architecture, design verification, implementation, firmware, and post-silicon engineering organizations.
Proficiency with Verilog, SystemVerilog, and scripting languages such as Python, Perl, or Tcl for design automation and productivity improvements.
Experience leveraging AI-enabled tools to improve design workflows, automation, analysis, debug, documentation, or engineering productivity.
Demonstrated ability to lead technical reviews, influence design decisions, and drive complex technical issues to resolution.
Strong written and verbal communication skills with the ability to present technical information to engineering and leadership audiences.
Demonstrated technical leadership, ownership, accountability, and commitment to engineering excellence.

ACADEMIC CREDENTIALS

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field preferred.
Master's degree or Ph.D. in a related technical discipline desired.

LOCATION:

Markham, Ontario, Canada

#HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Provide technical leadership for IOHUB IP development, overseeing the process from architecture through tape-out and post-silicon validation. Collaborate with cross-functional teams to define requirements, drive design quality, and implement scalable solutions for high-performance computing.

Requirements

Requires deep expertise in RTL design, microarchitecture, and complex IP development within advanced SoC environments. Candidates should possess strong leadership skills and proficiency in industry-standard design, verification, and automation tools.

Skills

ASIC Design
RTL Design
Microarchitecture
SoC
SystemVerilog
Verilog
Python
Perl
Tcl
Formal Verification
Static Analysis
Timing Closure
Post-silicon Validation
Technical Leadership
AI-enabled Engineering
IP Development

Visa sponsorship

Not detected in the job text

Keywords

ASIC
RTL
SoC
IP Development
Microarchitecture
SystemVerilog
Verilog
Python
Perl
Tcl
Formal Verification
Static Analysis
Timing Closure
Post-silicon
AI-assisted Workflows
Automation
Data Center
Server
Embedded
Virtualization
Power Efficiency
Scalability
Security
Tape-out
Engineering Leadership
High-performance Computing
Architecture
Design Verification
Firmware
Physical Design

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