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Added 20 mins ago
P
Senior Associate -Cyber Security Forward Deployed(Bilingual FR/EN)
PwC
Calgary, AB · Vancouver, BC · Ottawa, ON · Toronto, ON
- Full-time
…dynamic, client-facing environment. You operate as the senior engineer on a delivery pod, mentor Associates, own technical workstreams end-to-end, and translate client ambiguity into…
Added 35 mins ago
HT
Designer, Development (Service)
Husky Technologies
Bolton, ON
- Full-time
The service team is currently seeking a Mechanical engineer/designer to specialize in resolving service issues.
Added 1 hour ago
N
Lead QA Test Engineer
Nasdaq
Toronto, ON
- Full-time
As a Lead QA Test Engineer, you'll play a critical role in ensuring the quality, reliability, and performance of Nasdaq's North American equities market systems - some of the most complex…
Added 2 hours ago
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Co-op, Mechanical Engineer
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Redwater, AB
- Internship
Analyze maintenance history and failure data to prioritize issues and opportunities
Added 4 hours ago
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Network Engineer
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Imani Health is looking for a skilled Network Engineer to support the deployment of our offline hospital system across partner hospitals and clinics.
Added 4 hours ago
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IOHUB Design Verification Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
IOHUB sits at the center of the system’s data paths. It includes two foundational IP blocks, IOHUB Core and IOMMU, as well as the IOHUB. IOHUB Core is the system’s PCI host bridge and…
Added 4 hours ago
AM
RTL Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
We are seeking a highly motivated RTL IP Design Engineer to join AMD's Security IP (SECIP) Design team. The team is responsible for the architecture, design, and verification of a broad…
Added 4 hours ago
AM
RTL Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
…expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem…
Added 4 hours ago
V
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Added 6 hours ago
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Designer, Development (Service)
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The service team is currently seeking a Mechanical engineer/designer to specialize in resolving service issues.
Added 8 hours ago
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Lead Software Engineer
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Mississauga, ON
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Experience: 8+ years of hands-on experience in software quality assurance, with a significant focus on test automation and SDET roles.
Added 8 hours ago
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Lead Software Engineer
Virtusa
Mississauga, ON
- Full-time
Experience: 8+ years of hands-on experience in software quality assurance, with a significant focus on test automation and SDET roles.
Added 8 hours ago
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AI Automation Engineer
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Mississauga, ON
- Full-time
Our approach is simple: Automate Improvement. We identify areas where data, AI and automation can remove friction, accelerate decision-making and improve how the business operates at scale.
Added 8 hours ago
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Forward Deployed Solution Engineer – Applied AI FDE
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Montreal, QC
- Full-time
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Added 9 hours ago
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ASIC/FPGA Design Verification Engineer, Senior
Qualcomm
Ottawa, ON
- Full-time
…enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will…
Added 9 hours ago
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…enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will…
Added 9 hours ago
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Added 9 hours ago
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CNC Machining Centre Programmer
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…effectively. Note discrepancies between blueprint specifications and test products as they arise and provide resolution through program…
Added 9 hours ago
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Co-op or Recent Graduates - CNC Programmers
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…effectively. Note discrepancies between blueprint specifications and test products as they arise and provide resolution through program…
Added 9 hours ago
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Senior Software Engineer
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Added 9 hours ago
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Remote, Canada
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Added 10 hours ago
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Added 10 hours ago
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General Fusion is seeking a Senior Electronics Engineer to join our Controls & Electronics team. This team designs and supports the data acquisition, instrumentation, and control…
Added 10 hours ago
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Mechanical Commissioning Associate
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…Mechanical Commissioning Associate will work alongside the Lead Data Centre Commissioning Engineer & Project Manager and the commissioning team during system startup, test preparation,…
Added 11 hours ago
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Senior Mechanical Engineer (Semiconductor Packaging)
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Advanced Micro Devices, Inc

RTL Design Engineer

33 Commerce Valley Drive, Markham, ON, L3T 7N6, Canada

Full-time

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Job details

Job type: Full-time
Apply by: Oct 9, 2027
Posting language: English
Posted: Oct 9, 2026

Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:
An RTL Design Engineering role in our Security IP (SECIP) team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our design engineers will work on block level RTL design and/or subsystem level integration for a variety of embedded MP subsystems. Your expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

THE PERSON:

A talented hardware RTL design engineer with strong records of technical ownership and execution to drive block level IP and/or MP subsystems design and associated verification assignments to completion. A forward-thinking engineer who tends to optimize/improve the workflow, anticipate/analyze/resolve technical issues, enjoy a competitive pace while empowering and mentoring team members. A strong written and verbal communicator with strong problem solving and attention to detail skills along with professional interpersonal communication capability.

KEY RESPONSIBILITIES:

Develop and maintain block level RTL IP and MP subsystems’ feature spec, micro-architecture, synthesizable RTL design methodology and infrastructure
Develop and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches and tests, and achieve design feature closure (feature spec vs. coverage metrics)
Triage regressions, debug specific simulations, analyze coverage, and work/resolve technical issues with design, verification, and other teams to achieve design feature and design rule closures (linting, timing, DFT, DFP and other rules)
Participate in verification testbench and test plan specification, influence testbench architecture development (design for verification aspect), review and improve feature and coverage test plans
Develop and execute the IP integration flow, coordinate IP release collaterals within the IP teams
Debug and resolve integration issues with SoC Integration, SoC DV and post-silicon validation teams

PREFERRED EXPERIENCE:

Excellent understanding of CPU and MP subsystem architecture, datapath accelerator RTL microarchitecture, as well as FPGA based simulation or emulation methodology
Proficient in Verilog, System Verilog (an extra asset), and scripting (using Tcl, Ruby, Perl, Python and Makefile)
Excellent knowledge about state-of-art RTL design and verification methodology and best practices, and C-DPI test design
Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
Proven experience with ASIC design tools: synthesis, linting, simulation, debugging, power aware simulation, etc.

ACADEMIC CREDENTIALS:

Bachelor's Degree or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or possibly a related field
Master's Degree preferred

LOCATION: Markham, ON ( Open to Austin, TX)

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Develop and maintain block-level RTL IP and MP subsystems, including feature specifications and micro-architecture design. Coordinate IP integration flows and resolve technical issues with SoC integration and validation teams.

Requirements

Requires a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science. Candidates must have strong experience in RTL design, verification methodologies, and standard bus protocols like AXI and AHB.

Skills

RTL Design
Verilog
System Verilog
C-DPI
Micro-architecture
AXI
AHB
AMBA
Tcl
Ruby
Perl
Python
Makefile
ASIC Design Tools
FPGA Emulation
Debugging

Visa sponsorship

Not detected in the job text

Keywords

RTL Design
Security IP
Micro-processor
Hardware Accelerators
SoC
Cryptography
DMA
Power Management
Verilog
System Verilog
C-DPI
AXI
AHB
AMBA
Tcl
Ruby
Perl
Python
Makefile
ASIC
FPGA
Synthesis
Linting
Simulation
Debugging
Power Aware Simulation
DFT
DFP
Regression
Coverage Metrics

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