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Added 2 months ago
C
Full Stack Developer
CGI
Calgary, AB
- Full-time
Languages: Node.js/TypeScript, Java, C#, Python, or Go
Added 2 months ago
A(
Machine Learning Resident – Client: OpenCycle (12 month term)
Amii (Alberta Machine Intelligence Institute)
Edmonton, AB
- Full-time
Added 2 months ago
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Optical Reliability Engineer
Inpho
Canada
- $125,000 to $170,000 CAD / year
- Full-time
Strong statistical analysis skills (Minitab, JMP, Python, Excel).
Added 2 months ago
S
Software Architect - AI Accelerated Engineering Lead
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- Full-time
Manage GenAI-driven teams: Orchestrate multi-developer environments where AI agents and engineers work side by side - ensuring productivity, quality, and responsible adoption.
Added 2 months ago
Intermediate AI Engineer
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Winnipeg, MB
Languages & Core ML: Python, Machine Learning, Deep Learning, Generative AI
Added 2 months ago
A
Systems Engineer (Forward Deployed)
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- Full-time
Experience packaging, templating, and deploying applications with Helm charts for Kubernetes/OpenShift Proficiency in Python and web frameworks (e.g., Django, Flask)
Added 2 months ago
AG
Manager, Data Science
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- Full-time
Proficiency in Python or R, and comfort working with media, sales, or consumer dataset types.
Added 2 months ago
EV
May 2027 Geographic Information Systems (GIS) Co-op
Elk Valley Resources
Calgary, AB
- $4,275 to $6,617 CAD / month
Familiarity with FME and AutoCAD as well as programming skills in in Python, Arcade, and SQL are an asset
Added 2 months ago
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SAP S/4HANA Data Management, Senior Manager (Bilingual FR/EN)
PwC
Montreal, QC
- Full-time
Knowledge of ETL processes, data profiling and transformation, SQL, Python, and related data-management technologies.
Added 4 months ago
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Software Engineer – Threat Protection (Windows/C++)
McAfee
Waterloo, ON · UNAVAILABLE, Ontario
- Full-time
Added 3 months ago
AC
Business Systems Analyst
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- Full-time
The successful candidate will leverage SQL, Python, and data analysis skills to identify insights, improve processes, validate data quality, and support informed decision-making. Working…
Added 2 months ago
AM
Mixed Signal Circuit Design Analysis & CAD Engineer ( Temporary 1 Year Contract)
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- Temporary
Desire to develop well-structured and maintainable scripts using scripting languages such as Python, Perl, TCL, etc.
Added 2 months ago
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Director, Data Solutions
QuadReal Property Group
Toronto, ON
- Full-time
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Added 2 months ago
VC
AI Engineer
Valsoft Corporation
Remote, Canada
- Full-time
- Remote
Fluency across popular languages and frameworks: Python, JavaScript, TypeScript, .NET, NextJS
Added 2 months ago
Senior Consultant - Fraud Analytics
EY
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Proficiency in SQL and experience with at least one analytical programming language or platform, such as Python, R, or SAS.
Added 2 months ago
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Senior Software Engineer, AI
Calabrio
Remote, Canada
- Remote
Strong experience with Python and backend frameworks such as Flask or Django for building production APIs and AI services.
Added 2 months ago
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Senior Software Developer
Cavtera
Ottawa, ON · Kanata, ON
- Full-time
We’re looking for a Senior Software Developer to join Cavtera’s growing development team.
Added 2 months ago
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Senior Software Developer, Full-Stack (Client experience)
Dialogue
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- Full-time
Your role as Senior Software Developer, Full-Stack
Added 2 months ago
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Intermediate Software Develope
Cavtera
Ottawa, ON · Kanata, ON
- Full-time
We’re looking for a Intermediate Software Developer to join Cavtera’s growing development team.
Added 2 months ago
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Sr. Systems Design Engineer - Data Center GPU
AMD
Markham, ON
- $96,800 to $145,200 CAD / year
- Full-time
Programming/scripting skills (e.g., C/C++, Python, Perl)
Added 2 months ago
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Senior Piping Stress Engineer 2 - Nuclear
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Toronto, ON · North York, ON
- Full-time
Added 2 months ago
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Security Advisor PAM Specialist
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Mississauga, ON · Ottawa, ON · Toronto, ON · Montreal, QC
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Added 5 months ago
AM
Lead Diagnostics Software Engineer, ATE Integration
Advanced Micro Devices, Inc
Markham, ON
- Full-time
Platform HW/SW Proficiency: Strong programming background in C/C++ and Python, with a concrete understanding of bare-metal or driver-level programming, registers, firmware interactions, and…
Added 4 months ago
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3D IC and ADVANCED PACKAGING CAD ENGINEER
Advanced Micro Devices, Inc
Markham, ON
- Full-time
Strong scripting skills in Python, TCL, and Perl in a Linux/Unix environment.
Added 4 months ago
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RTL Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
Proficient in Verilog, System Verilog (an extra asset), and scripting (using Tcl, Ruby, Perl, Python and Makefile)

Advanced Micro Devices, Inc

RTL Design Engineer

33 Commerce Valley Drive, Markham, ON, L3T 7N6, Canada

Full-time

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Job details

Job type: Full-time
Apply by: Jun 29, 2027
Posting language: English
Posted: Jun 29, 2026

Original job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges - striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

An RTL Design Engineering role in our Security IP (SECIP) team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our design engineers will work on block level RTL design and/or subsystem level integration for a variety of embedded MP subsystems. Your expertise will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

THE PERSON:

A talented hardware RTL design engineer with strong records of technical ownership and execution to drive block level IP and/or MP subsystems design and associated verification assignments to completion. A forward-thinking engineer who tends to optimize/improve the workflow, anticipate/analyze/resolve technical issues, enjoy a competitive pace while empowering and mentoring team members. A strong written and verbal communicator with strong problem solving and attention to detail skills along with professional interpersonal communication capability.

KEY RESPONSIBILITIES:

Develop and maintain block level RTL IP and MP subsystems’ feature spec, micro-architecture, synthesizable RTL design methodology and infrastructure
Develop and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches and tests, and achieve design feature closure (feature spec vs. coverage metrics)
Triage regressions, debug specific simulations, analyze coverage, and work/resolve technical issues with design, verification, and other teams to achieve design feature and design rule closures (linting, timing, DFT, DFP and other rules)
Participate in verification testbench and test plan specification, influence testbench architecture development (design for verification aspect), review and improve feature and coverage test plans
Debug and resolve integration issues with SoC Integration, SoC DV and post-silicon validation teams
Provide technical leadership in IP functionality and design methodology development as well as critical problem resolution if as advanced level team members

PREFERRED EXPERIENCE:

Proven understanding of CPU and MP subsystem architecture, datapath accelerator RTL microarchitecture, as well as FPGA based emulation and prototyping methodology
Proficient in Verilog, System Verilog (an extra asset), and scripting (using Tcl, Ruby, Perl, Python and Makefile)
Excellent knowledge about state-of-art RTL design and verification methodology and best practices, and C-DPI test design
Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
Proven experience with ASIC design tools: synthesis, linting, simulation, debugging, power aware simulation, etc.
Relevant design domain specific knowledge and technical leadership capability required for advanced level candidates

ACADEMIC CREDENTIALS:

Bachelor's Degree or Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or possibly a related field
Master's Degree preferred

LOCATION: Markham, ON

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Develop and maintain block-level RTL IP and MP subsystems, including feature specifications and micro-architecture design. Debug RTL designs using C-DPI methodology and collaborate with cross-functional teams to achieve design feature and rule closures.

Requirements

Requires a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science. Candidates must have proven experience in CPU/MP subsystem architecture, RTL design, and proficiency in Verilog and scripting languages.

Skills

RTL Design
Verilog
System Verilog
Micro-architecture
C-DPI
AXI
AHB
AMBA
ASIC Design Tools
Synthesis
Linting
Simulation
Debugging
Power Aware Simulation
FPGA Emulation
Scripting

Visa sponsorship

Not detected in the job text

Keywords

RTL Design
Security IP
Micro-processor
SoC
Cryptography
DMA
Power Management
Verilog
System Verilog
Tcl
Ruby
Perl
Python
Makefile
AXI
AHB
AMBA
ASIC
FPGA
Emulation
Prototyping
Synthesis
Linting
Simulation
Debugging
C-DPI
Hardware Acceleration
Data Compression
DFT
DFP

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