ASIC Verification Engineer, AI Networking IP
- Ottawa, ON, Canada
- Kanata, ON, Canada
$91,200 to $136,800 USD / year · Full-time
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Job details
- Pay
- $91,200 to $136,800 USD / year
- Job type
- Full-time
- Apply by
- Posting language
- English
- Posted
Original job description
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.
The Role
We are looking for a talented ASIC Verification Engineer to join our team of experts, developing high-performance networking and communications IP for advanced AMD products. You’ll work with a highly motivated team of engineers developing best-in-class verification environments for leading edge AI networking and communications silicon.
The Person
You want to develop yours skills in ASIC verification and digital design and join a world class team. You have a passion for continous improvement, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Key Responsibilities
- Contribute to the development of advanced, re-usable verification environments and IP components
- Investigate and root cause issues found during the IP development stage
- Write tests, sequences, and testbench components in SystemVerilog and UVM to verify the design
- Employ a Coverage-Driven Verification methodology with Constrained Random Stimulus
- Contribute to process improvements via automation of tasks and exploring and evaluating new tools and methodologies
- Drive formal verification for the block and write formal properties and assertions to verify the design
- Understanding of digital design principles
- Understanding of Object Oriented Coding practices
- Experience with SystemVerilog, C or C++ programming languages
- Experience with agentic coding tools such as Claude Code or Codex
- Experience with Python, Perl or other scripting languages is an asset
- Bachelors or Masters degree in computer engineering/Electrical Engineering
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
More about this job
Responsibilities
Develop reusable verification environments and IP components for AI networking and communications silicon, and investigate and root-cause issues during IP development. Write SystemVerilog and UVM tests, sequences, and testbench components; apply coverage-driven and constrained-random verification; and contribute to formal verification and process improvements.
Requirements
The role seeks a candidate with an understanding of digital design principles and object-oriented coding practices, along with experience in SystemVerilog, C, or C++. Python, Perl, or other scripting experience is an asset; experience with agentic coding tools such as Claude Code or Codex is also noted, and a bachelor's or master's degree in computer or electrical engineering is listed.
Skills
- ASIC Verification
- Digital Design
- SystemVerilog
- UVM
- Coverage-Driven Verification
- Constrained Random Stimulus
- Formal Verification
- Formal Properties
- Assertions
- Object-Oriented Coding
- C
- C++
- Python
- Perl
- Automation
- Problem-Solving
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Manufacturing
Keywords
- ASIC Verification
- AI Networking
- Communications IP
- Semiconductor
- Digital Design
- Verification Environment
- Reusable IP Components
- SystemVerilog
- UVM
- Testbench
- Constrained Random Stimulus
- Coverage-Driven Verification
- Formal Verification
- Formal Properties
- Assertions
- Object-Oriented Coding
- C
- C++
- Python
- Perl
- Scripting
- Automation
- Claude Code
- Codex
- Root Cause Analysis
- Process Improvement
- Computer Engineering
- Electrical Engineering