Design Verification Technical Lead
- Ottawa, ON, Canada
- Kanata, ON, Canada
$187,200 to $280,800 USD / year · Full-time
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Job details
- Pay
- $187,200 to $280,800 USD / year
- Job type
- Full-time
- Apply by
- Posting language
- English
- Posted
Original job description
At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.
The Role
This is a Technical Lead/Manager role for ASIC Hardware and Firmware Co-Verification Engineering role with the Security IP Team (SECIP) in AMD . The primary focus of this role is to Lead and Manage the team responsible for Hardware/Firmware co-verification of various embedded micro-processor subsystems and the associated hardware accelerators in leading edge SOC’s. The preferred candidate will also have proven experience in Firmware based HW verification and the ability to contribute to Firmware development initiatives. These IP subsystems provide high performance functions to the respective SoC, such as security policy management, cryptography, data compression, high throughput DMA, etc.
The Person
The ideal candidate has experience leading others in technical and managerial settings. You also have excellent communication, writing, and presentation skills.
Key Responsibilities
- Lead a high-performance engineering team
- Form a team and nurture talent
- Lead team, meet schedule commitments and provide strong support to customers
- Collaborate with multi-functional leaders to drive AMD's success
- Responsible to performance review , career development for team member .
- Managed the team that is responsible for implementing / executing below task
- Hardware/Firmware co-verification in UVM System Verilog and C-DPI structured testbench.
- Hardware/Firmware co-verification in FPGA hardware prototype platform.
- Develop and maintain subsystem verification architecture, testbench, test methodology for
- Embedded CPU and subcomponent IPs with
- AXI/AHB busses and HW accelerators such as
- Cryptography, Data Compression, DMA, etc.
- Participate in subsystem specification, influence IP micro-architecture development (HW and FW co-design and verification aspect), develop and verify abstracted performance model
- Create abstracted FW and HW performance models
- Develop critical target code to collect IP performance key parameters
- Explore subsystem architecture performance trade-off for FW and HW optimization
- Drive team to Develop and execute subsystem and block level test plans
- Develop FW/HW co-verification methodology
- Develop UVC and System Response models
- Develop and debug UVM and C-DPI test cases with integrated FW
- Improve verification metrics
- Further develop subsystem and block level testbenches using UVM randomized test methodology and C-DPI directed test methodology.
- Develop and maintain subsystem level integration scripts
- Develop and maintain subsystem testbench build and test run scripts
- Drive to verification metrics closure
- Interface with SoC integration and SoC DV teams
- Define and develop IP level DV API to support SoC level DV effort
- Develop and maintain IP build and delivery infrastructure to support SoC level integration of SMU IPs.
- Support SoC level IP emulation, silicon bring-up and debugging effort
- A strong leader with experience working with a distributed team
- Strong mentoring and coaching skills
- Proven experience managing and leading engineering teams
- Prior experience in optimizing performance (client, server, system, or embedded)
- Strong system and software engineering background
- Strong communications skills. Able to summarize complex problems for executives as well as drill down to details with architects and engineers
- Strong analytic and problem-solving skills including the ability to analyze current behavior, identify potential areas for improvement and design of experiments
- Must be a self-starter and self-motivated
- Prior experience Managing technical teams
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
More about this job
Responsibilities
Lead and manage a team verifying embedded processor subsystems and hardware accelerators through hardware/firmware co-verification, testbench development, performance modeling, and verification-metric closure. Coordinate with SoC integration and design verification teams, support IP delivery and emulation, and contribute to silicon bring-up and debugging.
Requirements
The role calls for a proven engineering team leader with experience managing and mentoring distributed teams, a strong hardware and software engineering background, and expertise in performance optimization and problem-solving. A bachelor's or master's degree in computer or electrical engineering is preferred, along with strong communication skills and experience in firmware-based hardware verification.
Skills
- Team Leadership
- Engineering Management
- Hardware/Firmware Co-Verification
- UVM
- SystemVerilog
- C-DPI
- FPGA Prototyping
- ASIC Verification
- Embedded Processors
- Verification Architecture
- AXI/AHB Buses
- Performance Modeling
- Firmware Development
- Testbench Development
- SoC Integration
- Cryptography
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Management & Leadership
- Manufacturing
Keywords
- ASIC
- Hardware/Firmware Co-Verification
- Security IP
- Embedded Microprocessors
- System-on-Chip
- UVM
- SystemVerilog
- C-DPI
- FPGA
- AXI
- AHB
- Cryptography
- Data Compression
- DMA
- Verification Architecture
- Testbench
- Randomized Testing
- Directed Testing
- Performance Modeling
- Firmware Development
- Hardware/Software Co-Design
- Verification Metrics
- IP Integration
- Emulation
- Silicon Bring-Up
- Verification Methodology
- Team Management
- Performance Optimization