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Added 1 hour ago
ES
Senior Business Analyst
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- Full-time
As an EPAM Systems, Inc. (NYSE: EPAM) company, a leading global provider of digital platform engineering and development services, we deliver advanced financial services solutions by…
Added 1 hour ago
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- $80,000 to $120,000 CAD / year
- Full-time
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- $85,000 to $95,000 CAD / year
- Full-time
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Added 4 hours ago
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Senior Electrical Engineer, Traffic Signals Team Lead
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Client Management, Program Management and Senior Engineering responsibilities
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Senior Associate -Cyber Security Forward Deployed(Bilingual FR/EN)
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…clients, helping secure their cloud environments and software development processes. In this consulting role, you will tackle complex security challenges – performing analyses, setting up…
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Devops Engineer
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- $55 to $65 CAD / hour
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Added 7 hours ago
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…three scrum teams located in Ottawa and Calgary. As a DevOps Engineer, you will provide senior AWS expertise, facilitating the transition from on-premises infrastructure to AWS. This role…
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Devops Engineer
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5+ years of experience with C++ or C for software design/development.
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Added 8 hours ago
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IOHUB Design Verification Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
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Added 8 hours ago
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RTL Design Engineer
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- Full-time
We are seeking a highly motivated RTL IP Design Engineer to join AMD's Security IP (SECIP) Design team. The team is responsible for the architecture, design, and verification of a broad…
Added 9 hours ago
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Jr. Mechanical Engineer
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Principal Software Developer
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Toronto, ON · AMER - Canada - Ontario - Toronto - University Ave
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Full Stack Developer (Java + Angular)
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CGI is seeking a highly skilled and experienced Senior Full Stack Engineer to join our growing team. In this role, you will leverage your expertise in Java, Spring Boot, Microservices,…
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Sr Software Developer (Lead) - EN 178
Export Development Canada | Exportation et développement Canada
Vancouver, BC
- $96,557 to $128,743 CAD / year
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Software Engineer 18: Salaries typically range from $96,557 to $128,743 annually, based on qualifications and experiences, plus a performance-based incentive

AMD

IOHUB Design Verification Engineer

Markham, ON, Canada

$128,000 to $192,000 USD / year · Full-time

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Job details

Pay: $128,000 to $192,000 USD / year
Job type: Full-time
Apply by: Nov 8, 2026
Posting language: English
Posted: Oct 9, 2026

Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

The Role

The AMD NBIO (North Bridge I/O) team delivers industry-leading, high-performance interconnect IP for AMD products, including discrete GPUs, machine learning products, APUs, servers, and game consoles. The global NBIO organization operates seamlessly across China, North America, and Europe.

IOHUB sits at the center of the system’s data paths. It includes two foundational IP blocks, IOHUB Core and IOMMU, as well as the IOHUB. IOHUB Core is the system’s PCI host bridge and provides decoding and routing services to PCIe and other devices. The IOMMU (I/O Memory Management Unit) is responsible for address translation and memory protection. It plays a critical role in I/O virtualization technology, which is widely used in hyperscale data centers.

The Person

The successful candidate will work closely with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, with strong communication and problem-solving skills.

Demonstrates strong teamwork
Drives work through completion

Key Responsibilities

Define the IOHUB verification strategy and scope.
Develop the IOHUB test plan, implement DRVR, and drive verification closure.
Work closely with the Design and Architecture teams to develop new verification components.
Organize and attend conference calls with global teams for strategy alignment, status synchronization, and related activities.

Preferred Experience

Experience working in a global company and fluency in spoken English.
Experience with complex IP, ASIC, or SoC design verification. Direct experience with IP/SoC development, processors such as CPUs or GPUs, or industry bus standards such as PCIe or HT is preferred.
Good knowledge of UVM, Verilog, SystemC, and SystemVerilog.
Solid knowledge of hardware verification methodologies, including coverage-based verification, hardware assertions such as PSL or SVA, and constrained-random techniques.
Experience with verification planning is an asset.
Knowledge of virtualization is an asset.
Experience developing with AI assistants is a plus.
Strong collaboration skills.

Academic Credentials

Master’s degree in electrical engineering and digital ASIC or SoC design verification experience, or
Bachelor’s degree in electrical engineering and digital ASIC or SoC design verification experience.

Location:

Markham, ON or Vancouver, BC

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Define the IOHUB verification strategy and scope, develop the test plan, implement the driver, and drive verification to closure. Collaborate with design, architecture, and global teams to develop verification components and align on strategy and status.

Requirements

Requires a master's degree in electrical engineering with digital ASIC or SoC design verification experience, or a bachelor's degree in electrical engineering with such experience. Candidates should have experience with complex IP, ASIC, or SoC verification and knowledge of UVM, Verilog, SystemC, SystemVerilog, coverage-based methods, assertions, and constrained-random techniques; PCIe, processor, virtualization, and AI-assistant experience are advantageous.

Skills

Design Verification
Verification Planning
UVM
Verilog
SystemC
SystemVerilog
Coverage-Based Verification
Hardware Assertions
PSL
SVA
Constrained-Random Verification
PCIe
IOMMU
Virtualization
Problem-Solving
Collaboration

Visa sponsorship

Not detected in the job text

Keywords

AMD
NBIO
IOHUB
IOHUB Core
IOMMU
Design Verification
Verification Strategy
Verification Planning
Test Plan
DRVR
IP
ASIC
SoC
CPU
GPU
PCIe
HT
UVM
Verilog
SystemC
SystemVerilog
Coverage-Based Verification
PSL
SVA
Constrained-Random Techniques
Virtualization
I/O Memory Management
Address Translation
Memory Protection
AI Assistants

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