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AMD

Silicon Design Engineer

Markham, ON, Canada

Pay: $91,200 to $136,800 USD / year
Job type: Full-time
Apply by: Oct 28, 2026
Posting language: English
Posted: Sep 28, 2026

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Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

Silicon Design Engineer 2 - Security IP

THE ROLE:

An ASIC design engineering role in our Security IP team, where a large number of individual embedded micro-processor (MP) subsystems and associated hardware accelerators vital to improve subsystems performance and functionality are designed and verified. These subsystem IPs provide high performance functions to System on Chip (SoC) silicon products across all AMD business units such as client computers, servers, discrete graphics, and gaming. Our design and verification engineers will work on block level functional design and verification and/or subsystem level integration and verification for a variety of embedded MP subsystems. Your contribution will impact security policy management, cryptography, data compression, high throughput DMA, power management, and many other subsystem applications.

THE PERSON:

A talented electrical or computer engineering recent grad with demonstrated strong academic records of relevant courses and projects in hardware logic design and computer architecture, above average capability of C/C++, Verilog or System Verilog programming, fast learning of technical concepts, and analytic thinking. A strong written and verbal communicator with excellent problem solving and attention to detail skills along with professional interpersonal communication capability.

THE ROLE:

Develop and refine MP subsystem design and verification workflow and methodology by creating and debugging automation scripts
Modify and debug RTL designs using C-DPI directed test methodology, and/or using verification team’s testbenches and tests
Set up and debug test regressions, analyze simulation results, resolve technical issues with design, verification teams
Develop and debug test plans using SystemVerilog/UVM constrained-random test methodology and C-DPI directed test methodology, and using object-oriented programming (OOP) techniques to implement/maintain testbenches and tests

PREFERRED EXPERIENCE:

Completed a minimum of 4 years of academic study in Electrical Engineering, Computer Engineering, or Computer Science with strong records in relevant technical courses and projects
Excellent in programming using C/C++, one or more of Ruby, Perl, Python and Makefile
Basic understanding of computer architecture, digital circuits and systems
Basic knowledge about Verilog and System Verilog languages
Basic knowledge about ASIC design & verification tools
Basic knowledge in AI based design concepts
Prior experience with ASIC IP design through internship is an asset

ACADEMIC CREDENTIALS:

Bachelor’s or Master’s in electrical engineering, computer engineering, or comparable disciplines

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Design, modify, and debug RTL for embedded microprocessor subsystems, and develop verification plans, testbenches, and tests using SystemVerilog/UVM and C-DPI methodologies. Create and debug automation workflows, run and analyze test regressions, and resolve technical issues in collaboration with design and verification teams.

Requirements

Candidates should have at least four years of academic study in electrical engineering, computer engineering, computer science, or a comparable discipline, with strong relevant coursework and projects. The role calls for strong C/C++ programming, familiarity with scripting languages and Makefiles, and foundational knowledge of computer architecture, digital systems, Verilog/SystemVerilog, and ASIC design and verification tools.

Skills

ASIC Design
RTL Design
Hardware Logic Design
Computer Architecture
C/C++
Verilog
SystemVerilog
UVM
C-DPI
Constrained-Random Verification
Object-Oriented Programming
Testbench Development
Test Plan Development
Regression Testing
Automation Scripting
Problem Solving

Visa sponsorship

Not detected in the job text

Keywords

ASIC
Security IP
Embedded Microprocessor Subsystems
RTL
System-on-Chip
Hardware Accelerators
Hardware Logic Design
Computer Architecture
Digital Circuits
C/C++
Verilog
SystemVerilog
UVM
C-DPI
Constrained-Random Testing
Object-Oriented Programming
Testbenches
Test Plans
Regression Testing
Simulation
Automation Scripts
Ruby
Perl
Python
Makefile
ASIC Design and Verification Tools
Cryptography
Data Compression
DMA
Power Management

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