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Added 25 days ago
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Senior Software Engineer - Conversational AI (Python)
Glia
Remote, Canada
- Full-time
- Remote
Coding languages: Python, Elixir, TypeScript, React (JavaScript)
Added 25 days ago
SI
Silicon Validation Software Engineer (Sr Staff)
Synopsys Inc
Mississauga, ON
- Full-time
You are comfortable sitting with an analog designer reviewing scope traces one hour and writing Python to parse gigabytes of characterization data the next. You do not wait for perfect…
Added 25 days ago
SI
Silicon Validation Engineer
Synopsys Inc
Mississauga, ON
- Full-time
Automate test sequences and data analysis using Python and MATLAB, turning raw measurements into actionable insights and clear reports for design teams and customers
Added 25 days ago
SI
System Level Test Engineer - 18758
Synopsys Inc
Ottawa, ON
- Full-time
We are seeking a System Level Test Engineer to own system-level silicon validation of DDR, LPDDR, and HBM memory interface IP in the lab. You bring up silicon, prove training,…
Added 25 days ago
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Senior Agentic AI Engineer- Physical AI hub, Kitchener
Siemens
Kitchener, ON
- Full-time
We are seeking a Senior Agentic AI Engineer to build the harness reasoning, monitoring, recovery, and completion-gating capabilities for the Physical AI Runtime. This engineer will design…
Added 25 days ago
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Quality Assurance Engineer - Physical AI hub, Kitchener
Siemens
Kitchener, ON
- Full-time
We are seeking a QA / Test Automation Engineer to help validate the Physical AI Runtime across orchestration, harnessing, edge deployment, traceability, and hardware-in-the-loop scenarios.…
Added 25 days ago
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Robotics Engineer - Edge Runtime, Physical AI Hub, Kitchener
Siemens
Kitchener, ON
- Full-time
We are seeking a Robotics Engineer - Edge Runtime to help build and optimize the edge software layer for the Physical AI Runtime. This engineer will work on edge development, robotics…
Added 25 days ago
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STA/Constraints Engineer
AMD
Vancouver, BC
- $128,000 to $192,000 USD / year
- Full-time
The STA/Constraints Engineer is responsible for developing FullChip constraints and timing closure. Person will work closely with Fellows, Principal Engineers, Architects, collaborate with…
Added 25 days ago
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AI Platform Engineer, Silicon Design Infrastructure
AMD
Markham, ON
- $155,200 to $232,800 USD / year
- Full-time
We are seeking a hands-on engineer to build and operate the development infrastructure and AI solutions that underpin AMD's AI-assisted silicon design program. This role sits at the…
Added 25 days ago
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Senior Data Engineering
Autodesk
Toronto, ON · AMER - Canada - Ontario - Toronto - University Ave
- Full-time
We are looking for an exceptional analytics/data engineer to transform, optimize, test, and maintain architectures for enterprise analytics databases, data pipelines, and processing…
Added 25 days ago
SC
Co-op ASIC Digital Verification Engineer
SiTime Corporation
Ottawa, ON
- Temporary
To further strengthen the team at our Ottawa location, we are looking for a Co-op ASIC Digital Verification Engineer who will work on the development of state of the art mixed-signal PLL…
Added 25 days ago
SC
Co-op ASIC Systems Engineer
SiTime Corporation
Ottawa, ON
- $24 to $26 CAD / hour
- Temporary
As a Systems Engineer we are the first in line to work on brand new devices from Silicon Designers before they get into the hands of customers. The devices that SiTime Canada works on are…
Added 25 days ago
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Research Engineer - Benchmarks
Mendable
Toronto, ON
- $250,000 to $290,000 USD / year
- Full-time
You're strong in Python and API integrations, and comfortable with messy vendor APIs, rate limits, and inconsistent schemas.
Added 25 days ago
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Principal Data Quality and Governance Engineer
''
Toronto, ON
- Full-time
Position Title: Principal Data Quality and Governance Engineer
Added 25 days ago
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CPU DFT Engineer
NUVACORE
Markham, ON
- Full-time
As a CPU DFT Engineer, you will participate in the following areas:
Added 25 days ago
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CPU Clock Distribution and Custom Clock Design
NUVACORE
Markham, ON
- Full-time
As a Custom Clock Design and Distribution (CCD) Engineer, you will participate in the following :
Added 25 days ago
RB
Senior Cloud Security Engineer ( Global Security)
Royal Bank of Canada
Toronto, ON · Vancouver, BC
- Full-time
…RBC’s AWS environment. In this role as a Senior Cloud Security Engineer, you will develop AWS security controls and drive the development of innovative cloud security solutions to enhance…
Added 25 days ago
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Senior Technical Support Engineer
Sentry
Remote, Canada
- $125,000 to $150,000 USD / year
- Full-time
- Remote
We are architecting the Technical Support engine. We’re looking for a veteran engineer to help us redefine the standard of technical support by combining deep human expertise with…
Added 25 days ago
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Senior Applied AI Engineer
RaiseDesk
Remote, Canada
- Full-time
- Remote
We are looking for an Applied AI Engineer to own the intelligence layer of the platform: the data that powers investor discovery, the models and retrieval that rank and explain it, and the…
Added 25 days ago
LS
Senior BLE Firmware Engineer - 6 Month Contract - 19516
LRO Staffing
Ottawa, ON
- Contract
Assets: BLE security/DFU, secure boot, RF/interoperability testing, automated testing/CI, Python, Thread/Matter/802.15.4 and previous IoT/sensor development
Added 25 days ago
MC
Software Engineer, C#/.NET
Moody's Corporation
Toronto, ON
- Full-time
Experience in programming languages including C#, Visual Basic .NET, and Python; C++ is an asset
Added 25 days ago
TC
Infra / Cloud & GenAI Architect
Tata Consultancy Services
Calgary, AB
- Full-time
Hands on experience in Automation scripts such as Windows PowerShell/Bash, Python Scripting etc. Embed Gen AI capabilities into web, mobile, and edge applications
Added 25 days ago
Security Engineer (17-Month Contract)
Varicent
Toronto, ON
Varicent is looking for a hands-on Security Engineer to join our Information Security team on a 17-month contract and help strengthen the security of our systems, applications, and cloud…
Added 25 days ago
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Senior AI Engineer - Evisort AI
Workday
Vancouver, BC · Canada, BC, Vancouver
- Full-time
As an AI Engineer, you will help develop tailored user experiences using advanced LLMs, Knowledge Graphs, personalization, and predictive analysis. You will collaborate with other engineers…
Added 25 days ago
Senior Software Engineer, Security Engineering (Auth0)
Okta
Toronto, ON
Senior Software Engineer, Security Engineering

AMD

STA/Constraints Engineer

Vancouver, BC, Canada

$128,000 to $192,000 USD / year · Full-time

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Job details

Pay: $128,000 to $192,000 USD / year
Job type: Full-time
Apply by: Oct 30, 2026
Posting language: English
Posted: Sep 30, 2026

Original job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we’ll advance your career.

The Role

The STA/Constraints Engineer is responsible for developing FullChip constraints and timing closure. Person will work closely with Fellows, Principal Engineers, Architects, collaborate with cross functional worldwide teams across Physical Design, Timing Analysis, Synthesis, Physical Verification, Power signoff, and mentor/coach/guide Design Engineers.

KEY RESPONSIBILITIES: 

Own end-to-end delivery of designs (SOC and Sub-system integration) from timing constraints and timing signoff perspective.
Work closely with the SOC Architecture team for SOC clocks & STA for statistical timing target goals.
Understanding clock design requirements and making sure they are correctly set up in SDC.
Understand timing margins (LVF/SSTA/Variations etc.) on the latest tech nodes and work with timing methodology teams for future and current projects.
Understand design requirements, timelines and various milestones of a project and deliver FCT closure accordingly.
Collaborate with CAD and EDA vendors to further strengthen AMD timing closure and constraints methodology.
Responsible for cdc/lint, timing closure, lower power implementation and netlist quality check with RTL designer and PD team.
Work on SDC development, STA (Static Timing) analysis, shift left of timing closure, CDC (Clock Domain Crossing).

PREFERRED EXPERIENCE: 

Industry experience in STA, constraints and timing signoff.
Expert user of industry-standard PD tools like SNPS PT/GCA (must) and ICC2/FC (desired).
Good experience with Perl/TCL/Shell/Python scripting, and Verilog RTL design.
Excellent presentation and inter-communication skills.
Experience with Verilog RTL design/implementation and has experience of large digital ASIC project.
Experience with physical design is a plus.
Has Synthesis or physical implement experience.
Experience with lower power design methodology.
Good English skills on talking, presentation and writing documents.
Good communication and strong sense of responsibility, task scheduling, and time management.

ACADEMIC CREDENTIALS: 

Bachelor/Master’s degree in Micro Electronics/ Integrated Circuit Science, or related field preferred.

LOCATION: Vancouver, BC

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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More about this job

Responsibilities

Own end-to-end timing constraints and signoff for SoC and subsystem designs, including clock setup, static timing analysis, timing closure, and CDC/lint activities. Collaborate with architecture, physical design, timing, synthesis, CAD, and EDA teams to meet project milestones, improve timing methodologies, and guide design engineers.

Requirements

Candidates should have industry experience in static timing analysis, constraints, and timing signoff, with expertise in Synopsys PrimeTime and GCA; ICC2 or Fusion Compiler experience is desired. The role also calls for scripting skills in Perl, Tcl, Shell, or Python, Verilog RTL experience, familiarity with large digital ASIC projects and low-power methodology, strong communication skills, and a preferred bachelor’s or master’s degree in microelectronics, integrated circuit science, or a related field.

Skills

Static Timing Analysis
Timing Constraints
Timing Signoff
Timing Closure
System-on-Chip Integration
SDC Development
Clock Design
Clock Domain Crossing
CDC and Lint
Low-Power Design
Netlist Quality Checks
PrimeTime
GCA
ICC2
Fusion Compiler
Perl, Tcl, Shell, and Python Scripting

Visa sponsorship

Not detected in the job text

Keywords

Static Timing Analysis
STA
SDC
Timing Constraints
Timing Signoff
Timing Closure
Full-Chip Constraints
SoC Integration
Subsystem Integration
Clock Design
Statistical Timing
LVF
SSTA
Timing Variations
Clock Domain Crossing
CDC
Lint
Low-Power Design
Netlist Quality
Synopsys PrimeTime
GCA
ICC2
Fusion Compiler
Perl
Tcl
Shell
Python
Verilog RTL
Physical Design
Synthesis

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