Closed listing
Physical Design Engineer
- Toronto, ON, Canada
Contract
This opening has closed.
The original listing is kept below for reference.
Job details
- Job type
- Contract
- Closing date
- Experience
- 5+ years of experience in ASIC or SoC Physical Design.
- Posting language
- English
- Posted
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Search current openingsOriginal job description
Archived listing. The details below describe a past opening.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related discipline.
5+ years of experience in ASIC or SoC Physical Design.
Hands-on expertise with Cadence Genus for synthesis and Cadence Innovus for floorplanning and implementation.
Experience working on large, high-performance semiconductor designs with demanding timing requirements.
Strong knowledge of synthesis, timing analysis, physical implementation, and PPA optimization.
Experience with advanced semiconductor process technologies such as 5nm, 3nm, or newer.
Excellent communication skills and the ability to work effectively with RTL, architecture, physical design, and implementation teams.
More about this job
Responsibilities
Perform physical design for large, high-performance ASIC or SoC projects, including synthesis, floorplanning, and physical implementation. Analyze timing and optimize power, performance, and area to meet demanding design requirements.
Requirements
Requires a bachelor's degree in Electrical Engineering, Computer Engineering, or a related discipline, and at least five years of ASIC or SoC physical design experience. Candidates should have hands-on experience with Cadence Genus and Innovus, knowledge of synthesis, timing analysis, physical implementation, and PPA optimization, and experience with advanced process technologies such as 5nm or 3nm.
Skills
- ASIC Physical Design
- SoC Physical Design
- Cadence Genus
- Synthesis
- Cadence Innovus
- Floorplanning
- Physical Implementation
- Timing Analysis
- PPA Optimization
- Advanced Semiconductor Processes
- High-Performance Design
- Cross-Functional Collaboration
- Communication
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Manufacturing
Keywords
- ASIC
- SoC
- Physical Design
- Cadence Genus
- Cadence Innovus
- Synthesis
- Floorplanning
- Physical Implementation
- Timing Analysis
- PPA Optimization
- Power, Performance, And Area
- 5nm Process Technology
- 3nm Process Technology
- Semiconductor Manufacturing
- High-Performance Semiconductor Designs
- RTL
- Architecture
- Electrical Engineering
- Computer Engineering