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Added 2 months ago
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Added 2 months ago
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Added 2 months ago
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Added 2 months ago
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Added 2 months ago
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Arm

FrontEnd CMA (CAD) Engineer

Toronto, ON, Canada

Salary Range: $99,900-$135,100 per year · Full-time

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Job details

Pay: Salary Range: $99,900-$135,100 per year
Job type: Full-time
Posting language: English
Posted: Aug 24, 2026

Original job description

Job Overview

Join the Chip Methodology & Automation (CMA) team within Arm's Solutions Engineering organization. As a FrontEnd CMA Engineer, you will define, develop, and deploy scalable methodologies, flows, and automation that enable efficient development of Arm-based SoCs.

The engineer will operate where front-end chip composition meets software engineering, partnering with groups responsible for developing, verification, implementation, architecture, and product engineering. You will help improve RTL quality, build integration, release readiness, and development efficiency by turning sophisticated build requirements into reusable, production-ready solutions.

This role provides an opportunity to influence methodologies used across multiple Arm projects and to improve how increasingly sophisticated SoCs are built, validated, and delivered.

Responsibilities

Own and improve front-end build methodologies and CAD flows from RTL development through implementation handoff.
Develop scalable solutions for RTL quality, verification, build/IP management, and flow
Build production-quality automation and infrastructure that improves engineering efficiency, consistency, and build quality.
Collaborate with build teams and EDA vendors to identify bottlenecks, resolve complex issues, and lead improvements in methodology.
Evaluate and deploy emerging EDA, automation, and AI technologies with measurable engineering impact.
Provide technical leadership and guide methodology strategy, adoption, and guidelines across teams and projects.

Vital Skills and Experience

Experience in ASIC/SoC build, Front-End CAD, build methodology, EDA automation, or related areas.
Strong understanding of digital build and the RTL-to-implementation lifecycle, including Verilog/SystemVerilog and front-end design flows.
Hands-on experience with RTL quality and verification methodologies such as Lint, CDC/RDC, low-power, formal/equivalence, and synthesis.
Strong Python proficiency along with knowledge of Tcl, Shell, Linux, source control, and regression/CI infrastructure.
Experience building scalable, production-quality CAD flows and automation used across projects.
AI-first approach, with experience applying AI/LLMs to automation, debug, analysis, and engineering efficiency.
Rapid, iterative approach to development - prototype, deploy, measure, and improve solutions based on real-world use.
Strong debugging and problem-solving skills across building, methodology, infrastructure, and EDA tools.
Strong collaboration and communication skills, with the ability to drive solutions from requirements through deployment and adoption across teams.

Preferred Skills and Background

Experience with industry-standard EDA tools from Synopsys, Cadence, Siemens EDA, or similar vendors.
Familiarity with UPF, SDC, low-power build, and advanced SoC integration.
Experience with building/IP qualification, configuration, and release management.
Experience building regression, analytics, or data infrastructure for semiconductor build flows.
Familiarity with advanced-node, hierarchical, or multi-die SoC development.
Experience collaborating across global teams and driving methodology adoption across projects.

Education

BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent proven experience.

Additional Information

Please note that no relocation package is available for this role. Don’t miss the chance to be part of a world-class team crafting innovative solutions for ambitious projects!

Salary Range: $99,900-$135,100 per year

We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

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More about this job

Responsibilities

Define and deploy scalable front-end build methodologies and CAD flows to enable efficient Arm-based SoC development. Develop production-quality automation and infrastructure to improve RTL quality, verification, and engineering efficiency.

Requirements

Requires experience in ASIC/SoC build and EDA automation with strong proficiency in Python, Tcl, and SystemVerilog. A degree in Electrical Engineering, Computer Science, or a related field is expected along with knowledge of RTL-to-implementation lifecycles.

Skills

ASIC/SoC Build
Front-End CAD
EDA Automation
Verilog
SystemVerilog
Python
Tcl
Shell
Linux
Lint
CDC/RDC
Synthesis
AI/LLMs
CI Infrastructure
RTL Quality
Low-Power Design

Visa sponsorship

Not detected in the job text

Keywords

ASIC
SoC
CAD
EDA
RTL
Verilog
SystemVerilog
Python
Tcl
Shell
Linux
Lint
CDC
RDC
Synthesis
UPF
SDC
Low-Power
AI
LLM
CI/CD
Synopsys
Cadence
Siemens EDA
Chip Methodology
Automation
Semiconductor
Hierarchical Design
Multi-die SoC
IP Management

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