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Added 29 mins ago
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Technical Lead - AI Delivery
Yochana
Brampton, ON
- Contract
Design, configure, test, and deploy Oracle AI Agents using Oracle AI Agent Studio.
Added 1 hour ago
GD
System Integration & Test, Intermediate
General Dynamics Mission Systems–Canada
Calgary, AB
- Full-time
Develop, maintain and enhance lab scripts and test automation to improve test coverage, repeatability and execution efficiency.
Added 1 hour ago
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Senior Systems Administrator
SPIN VFX
Toronto, ON
- Full-time
…and modernize it in a planned way, working alongside a DevOps engineer who owns provisioning and configuration tooling and a Systems Administrator who carries day-to-day fleet…
Added 1 hour ago
M
Senior Software Engineer
Manulife
Toronto, ON · Waterloo, ON
- Full-time
We are looking for a Senior Software Engineer to join our Affinity Life technology team. In this hands-on role, you will design, develop, modernize, and support mission-critical enterprise…
Added 1 hour ago
TI
Application Release Engineer
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Toronto, ON
- Contract
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Added 2 hours ago
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DevOps - Spécialiste Solution / DevOps - Solution Engineer
EXFO
Montreal, QC
- Full-time
EXFO est un chef de file mondial en matière de solutions intelligentes de test, de surveillance et d'analyse de réseaux. Nos technologies soutiennent les plus grands fournisseurs de…
Added 3 hours ago
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Software Engineer - Factory Apps - Intern
Altera
Toronto, ON
- Full-time
Develop or improve test cases, examples, scripts, and other resources that help validate features and demonstrate tool workflows.
Added 3 hours ago
Principle Backup Engineer
Scotiabank
Toronto, ON
In conjunction with the other GTEP Engineering and Architecture teams: Develop, Define, design, engineer, and implement hardware and solutions and maintain patterns and standards for…
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Control and Automation Engineer-in-Training
Hatch
Saskatoon, SK
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Added 3 hours ago
AF
Graduate Student, Forward Deployed Engineer
Ascendance Foundry
Toronto, ON
- Full-time
AI & AI Programming Essentials: AI-assisted software development: design, build, test, and improve applications and automations on strong engineering fundamentals.
Added 3 hours ago
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Data & AI Engineer - Real World Data and Healthcare Intelligence
Sanofi
Toronto, ON
- Full-time
Ownership of the entire back end of the application including the design, implementation, test, and troubleshooting of the core application logic, databases, data ingestion and…
Added 4 hours ago
TT
Software Development Engineer
Teledyne Technologies Incorporated
Edmonton, AB · Canada - Edmonton, AB
- Full-time
…reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research,…
Added 5 hours ago
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Cloud Software Engineer
McAfee
Toronto, ON · UNAVAILABLE, Ontario
- Full-time
As a Cloud Software Engineer, you will contribute to the full stack solutions for several consumer products using diverse technologies and best software development practices. You will work…
Added 5 hours ago
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General Dynamics Missions System International
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- Full-time
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Added 6 hours ago
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Software Engineer -Data Processing Backend
Morningstar
Toronto, ON
- Full-time
At Morningstar, helping investors is what brings us together and drives our work. We are looking for a Software Engineer who’s an expert with C# .NET and SQL to join our team and grow with…
Added 6 hours ago
Senior FPGA Research Engineer
Barco
Vancouver, BC
…industrial applications. We are looking for a hands-on senior FPGA engineer to lead the sensor acquisition and aggregation architecture connecting distributed imaging sensors to an…
Added 6 hours ago
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DevOps - Spécialiste Solution / DevOps - Solution Engineer
EXFO
Montreal, QC · Quebec, QC
- Full-time
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Principal Telecommunications Engineer
Worley
Calgary, AB
- Full-time
The purpose of the Principal Telecommunication Engineer role shall be to serve as a technical authority designing and delivering industrial telecommunication projects across Oil & Gas,…
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Principal Telecommunications Engineer
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Sudbury, ON · Greater Sudbury, ON
- Full-time
The purpose of the Principal Telecommunication Engineer role shall be to serve as a technical authority designing and delivering industrial telecommunication projects across Oil & Gas,…
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Principal Telecommunications Engineer
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Markham, ON
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Principal Telecommunications Engineer
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Oakville, ON
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The purpose of the Principal Telecommunication Engineer role shall be to serve as a technical authority designing and delivering industrial telecommunication projects across Oil & Gas,…
Added 6 hours ago
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DevOps - Spécialiste Solution / DevOps - Solution Engineer
EXFO
Montreal, QC
- Full-time
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Added 6 hours ago
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Principal Telecommunications Engineer
Worley
AB · Edmonton, AB
- Full-time
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Added 7 hours ago
Senior Software Dev Engineer, Route 53 Health Checks and Console Core
Amazon
Vancouver, BC
…plan with leadership, lead how we use AI to design, build, test, and operate software, and grow the engineers around you. You will own the distributed health checking infrastructure and the…
Added 7 hours ago
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DevOps - Spécialiste Solution / DevOps - Solution Engineer
EXFO
Montreal, QC · Quebec, QC
- Full-time
EXFO est un chef de file mondial en matière de solutions intelligentes de test, de surveillance et d'analyse de réseaux. Nos technologies soutiennent les plus grands fournisseurs de…

Barco

Senior FPGA Research Engineer

Vancouver, BC, Canada

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Job details

Experience: Substantial hands-on FPGA development experience, typically 7+ years or equivalent depth, with ownership of complex designs through hardware validation.
Posting language: English
Posted: Oct 29, 2026

Original job description

Overview

Barco's Vancouver team is developing FPGA-based sensing and edge AI capabilities for industrial applications. We are looking for a hands-on senior FPGA engineer to lead the sensor acquisition and aggregation architecture connecting distributed imaging sensors to an FPGA-based Edge AI compute module.

Your initial focus will be a distributed industrial imaging system: capturing synchronized images from multiple sensor nodes, transporting and aggregating their data, and delivering reliable streams for measurement and AI analysis. The architecture must balance throughput, timing, signal integrity, power, and cost per sensing node.

Your second major responsibility will be the development of the next iteration of our FPGA-based Edge AI compute module. You will lead FPGA architecture and accelerator-interface implementation, and co-develop the board with electronics and embedded-software engineers. The goal is a production-oriented system for workloads where validated throughput, power, and cost justify NPU deployment.

What You Will Do

Own FPGA architecture and RTL for sensor acquisition, synchronization, aggregation, and delivery to edge compute.

Implement and validate imaging-sensor interfaces, including Sub-LVDS/LVDS capture, deserialization, lane alignment, sensor timing, and configuration control.

Evaluate sensor-side bridge logic and hub architectures; select practical multiplexing, framing, and transport approaches based on measured performance and total system cost.

Develop multi-sensor pipelines with clock-domain crossing, elastic buffering, timestamps, stream identification, packetization, and explicit detection of missing or corrupted data.

Implement high-speed serial links using suitable vendor transceiver IP, line coding, lane alignment, link monitoring, and recovery mechanisms.

Integrate FPGA data paths with memory and hardware DMA, working with embedded-software engineers to deliver data to GPU/NPU processing pipelines.

Lead FPGA-side architecture for the FPGA + NPU board, including device selection, resource and transceiver budgets, PCIe topology, memory architecture, and host-control interfaces.

Co-develop board requirements with electronics engineers, including clocks, resets, power sequencing, high-speed routing constraints, debug access, and thermal and power budgets.

Implement and validate FPGA-to-NPU data movement, buffer management, flow control, and result handling using supported accelerator interfaces.

Work with embedded-software engineers and accelerator vendors on PCIe enumeration, DMA integration, driver/runtime compatibility, and recovery from link or accelerator faults.

Evaluate host-memory staging and direct-transfer options where supported; measure actual throughput, latency, CPU overhead, and memory use rather than assuming a zero-copy path.

Lead FPGA-related board bring-up and debug interface problems across RTL, PCB, firmware, and software boundaries.

Build self-checking simulations and repeatable hardware tests; close timing and characterize throughput, latency, data integrity, resource use, and power.

Qualify representative sensor links and compute interfaces under realistic cable lengths, industrial noise, and sustained workload conditions.

Document design decisions, interface specifications, validation results, and production handover requirements.

Requirements

Substantial hands-on FPGA development experience, typically 7+ years or equivalent depth, with ownership of complex designs through hardware validation.

Strong proficiency in VHDL or Verilog/SystemVerilog, synchronous design, clock-domain crossing, reset design, timing constraints, and timing closure.

Experience acquiring data from imaging sensors or other high-rate, source-synchronous devices.

Experience designing high-throughput, high-frame-rate multi-camera video pipelines, including synchronized stream aggregation or image assembly/tiling, buffering and bandwidth budgeting, and transfer from sensor-facing FPGA I/O to high-speed serial links.

Practical experience with FPGA high-speed transceivers and multi-channel streaming systems.

Hands-on Altera/Intel FPGA development experience using Quartus, preferably with Agilex or another SoC FPGA family.

Practical experience integrating FPGA PCIe interfaces and DMA engines, including hardware bring-up and debugging data-transfer problems.

Experience with memory interfaces, streaming interconnects such as AXI or Avalon, and throughput and buffering analysis across device boundaries.

Experience collaborating on custom FPGA boards, including schematic reviews, interface constraints, clock/reset planning, and board bring-up.

A disciplined verification approach, including self-checking testbenches, regression testing, and debugging on real hardware.

Ability to diagnose issues using embedded logic analyzers, oscilloscopes, and appropriate link or signal-integrity test equipment.

Clear technical communication and the ability to collaborate across FPGA, electronics, embedded software, and AI teams.

A degree in electrical engineering, computer engineering, or a related discipline, or equivalent practical experience.

Nice to Have

Integration of FPGA with PCIe-connected NPUs or GPUs.

PCIe root-complex/endpoint architecture, Linux DMA and buffer-sharing mechanisms, or supported peer-to-peer transfers.

Embedded Linux, SoC FPGA processor integration, C/C++, Python automation, or driver/API collaboration.

Familiarity with lower-cost FPGA families such as Gowin or Lattice.

Sony industrial imaging sensors, Sub-LVDS receivers, or comparable camera-interface development.

Ethernet-based sensor transport or multi-lane link bonding.

Industrial EMC testing, cable characterization, design-for-manufacture, or cost-driven hardware optimization.

Apply

Apply through jobs.barco.com. Please highlight a project where you owned FPGA acquisition, high-speed transport, PCIe/DMA integration, or custom-board bring-up, and describe your contribution to verification and system debugging. Do not submit confidential material from previous employers.

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More about this job

Responsibilities

You will lead the FPGA architecture and RTL development for sensor acquisition, aggregation, and edge AI compute modules. This includes co-developing board requirements with electronics and embedded software teams to ensure reliable, high-performance industrial imaging systems.

Requirements

Candidates must have 7+ years of hands-on FPGA development experience with proficiency in VHDL or Verilog/SystemVerilog. A degree in electrical or computer engineering is required, along with experience in high-speed serial links, PCIe integration, and hardware validation.

Skills

FPGA Architecture
RTL Design
Verilog
SystemVerilog
VHDL
Imaging Sensor Interfaces
High-speed Transceivers
PCIe
DMA
Timing Closure
Clock-domain Crossing
Altera/Intel Quartus
Agilex
Embedded Systems
Signal Integrity
Hardware Debugging

Visa sponsorship

Not detected in the job text

Keywords

FPGA
RTL
VHDL
Verilog
SystemVerilog
Edge AI
Imaging Sensors
Sub-LVDS
LVDS
PCIe
DMA
AXI
Avalon
Quartus
Agilex
SoC FPGA
Embedded Linux
NPU
GPU
Signal Integrity
Timing Closure
Clock-domain Crossing
Hardware Debugging
Industrial Imaging
Schematic Review
Firmware
Embedded Software
Python
C++
EMC Testing

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