About Celero
Celero Communications is building the next generation of intelligent optical connectivity for AI infrastructure.
Founded in 2024 by industry pioneers from Broadcom, Inphi, Marvell, and ClariPhy, Celero brings together decades of coherent DSP innovation with a focused mission to deliver the optical performance, power efficiency, and scalability required for tomorrow's AI-driven data centers.
We believe the future of AI infrastructure will be defined not only by speed, but by intelligence, energy efficiency, and the ability to seamlessly move massive amounts of data across increasingly complex networks.
Our mission is to build the technology foundation that makes this possible.
Headquartered in Irvine, California, with engineering teams in Canada and Argentina, Celero develops advanced coherent Digital Signal Processing (DSP) solutions that enable high-bandwidth, low-power optical connectivity for hyperscale AI infrastructure.
About the job
Celero is seeking an experienced, hands-on, and strategic Director of Firmware Engineering to lead the architecture, development, and validation of embedded firmware for our next-generation coherent DSP products for high-speed optical interconnects. Based onsite in Ottawa, Canada, you will own the firmware that brings our coherent DSP ASICs to life, controlling SerDes, framer, FEC, receive DSP, and analog/mixed-signal blocks, and make sure it is robust, high-performance, and production-ready from pre-silicon through mass deployment in hyperscale AI data centers. You will build and grow a high-performing firmware team, partner closely with digital design, analog/mixed-signal, DSP algorithm, verification, validation, and applications teams, and establish the processes, infrastructure, and quality standards that let firmware scale across multiple product generations. Day to day, you will set technical direction while staying deeply engaged in architecture reviews, silicon bring-up planning, and critical debug, working with colleagues across Celero's teams in Irvine, Canada, and Córdoba, Argentina.
Key Responsibilities
- Firmware Strategy: Define and own the firmware architecture, roadmap, and execution strategy for coherent DSP product lines, aligned with product requirements and customer timelines
- Team Leadership: Build, mentor, and scale a team of firmware engineers and technical leads. Set clear goals, drive accountability, and foster a culture of engineering excellence.
- Technical Authority: Serve as the primary firmware technical authority in cross-functional design reviews, architecture definition, and silicon bring-up planning
- Program Delivery: Own firmware schedules, resourcing, risk, and deliverables across multiple concurrent programs. Hold the team accountable to quality metrics from concept through production release.
- Datapath Control Firmware: Lead development of firmware to configure, control, and adapt high-speed SerDes, including link training, CTLE, FFE, and DFE adaptation, and link monitoring. Direct firmware for framer and FEC blocks, covering configuration, mode switching, performance monitoring, error statistics, and alarm handling.
- Receive DSP Firmware: Oversee firmware for receive DSP functions such as timing recovery, adaptive equalization, carrier and phase recovery, and convergence and tracking control loops
- Analog Calibration and Management: Own calibration firmware for DAC, DCA, and PLL blocks, including power-up and background calibration, temperature and voltage tracking, and lock and status monitoring. Drive firmware for power management, health monitoring, telemetry, diagnostics, and host interfaces such as MDIO, I2C, and CMIS.
- Pre-Silicon Verification: Establish and lead the pre-silicon firmware verification strategy using simulation, co-simulation, emulation, and FPGA prototyping. Partner with design verification teams to integrate firmware into RTL and AMS environments so firmware and hardware are validated together before tape-out.
- Regression and Quality: Build and maintain automated firmware regression infrastructure, including continuous integration, nightly regressions, coverage metrics, and pass/fail dashboards. Define coding standards, code review practices, release processes, and quality metrics for production-grade firmware.
- Bring-Up and Customer Support: Drive post-silicon bring-up, characterization support, and debug with validation, analog, and DSP teams. Support key customers and field applications teams during design-in, interoperability testing, and qualification, and work with systems, architecture, and product management to turn customer requirements into firmware features.
Basic Qualifications
- Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent experience; Master's degree or PhD preferred
- Experience: 15+ years of embedded firmware development experience, including significant work on high-speed communication ICs such as coherent DSPs, PAM4 DSPs, or SerDes-based devices, and 5+ years leading firmware teams with direct people management and technical leadership
- Delivery Track Record: Proven record managing firmware teams to deliver on schedule and to high quality, including planning, milestone tracking, dependency and risk management, defect reduction, and release readiness across multiple programs. Experience taking multiple products from pre-silicon through bring-up, qualification, and high-volume production.
- Technical Domain Expertise: Hands-on experience developing firmware to control SerDes, framer, FEC, and receive DSP blocks, and analog calibration firmware for DAC, DCA, and PLL circuits. Solid understanding of high-speed link fundamentals, including equalization, clock and data recovery, jitter, BER, and FEC performance.
- Verification and Automation: Direct experience with pre-silicon verification of firmware for digital and mixed-signal blocks (RTL simulation, co-simulation, emulation, FPGA prototyping). Strong record building and running firmware regression frameworks and automated test infrastructure.
- Embedded Skills: Expert proficiency in C/C++ for embedded systems and strong scripting skills in Python or similar. Experience with embedded processors (ARM, RISC-V, or proprietary microcontrollers), RTOS or bare-metal environments, and low-level hardware register programming.
Preferred Qualifications
Experience with one or more of the following:
- Coherent optical standards and modulation formats (400ZR/ZR+, 800ZR, OpenZR+, DP-QAM)
- OIF and Ethernet standards (OIF CEI, IEEE 802.3) and CMIS module management
- DSP algorithms and control-loop design for adaptive equalization, timing recovery, and carrier recovery
- UVM/SystemVerilog and AMS verification flows
- Hardware/software co-verification methodologies
- Optical module, line card, or hyperscale data center customers
- Secure boot, firmware update mechanisms, and functional safety or reliability practices
What Makes You Successful:
- You set technical direction while staying deeply engaged in architecture and critical debug
- You communicate clearly and influence across hardware, software, and business stakeholders
- You bring a disciplined approach to planning, execution, and risk management
- You are passionate about developing engineers and building inclusive, high-performing teams
- You take ownership and thrive in the ambiguity of a fast-moving startup
- You build the processes and infrastructure the team needs when little exists yet
- You work seamlessly with design, verification, validation, and applications teams to ship silicon
Why Join Celero?
As Director of Firmware Engineering, you will shape the firmware foundation of coherent DSP products from day one, founding the Ottawa firmware team alongside veterans of Marvell, Inphi, Broadcom, and ClariPhy. Your work will determine how our silicon performs from first bring-up through high-volume deployment at hyperscale customers. Celero is backed by CapitalG and Sutter Hill Ventures and is building the connectivity layer that lets large-scale AI systems operate as a unified whole.
If you're energized by innovation, enjoy solving complex challenges, and want to help define the future of AI connectivity, we'd love to hear from you.
