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Cerebras

Software Engineer - Host and Network IO

Toronto, ON, Canada

Job type: Full-time
Apply by: Oct 10, 2026
Experience: Master's/PhD in Computer Science or Electrical Engineering + 1 year industry experience, OR 3+ years industry experience.
Posting language: English
Posted: Sep 23, 2026

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Original job description

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.

This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.

Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.

About The Role

The Host and Network IO Team develops the full IO path implementation between a distributed system of server nodes, through the cluster, down to the custom RoCE network stack implemented in Cerebras' system, and over the proprietary IOs onto the WSE. As a software developer on the team, you will interface between AI application-level IO teams, cluster architecture teams, and FPGA/ASIC teams to develop solutions that optimize bandwidth and latency while minimizing congestion, pauses, pause spreading, unfairness, etc. Strong skills in socket programming will enable you to deploy robust management operations, while deftness in RDMA Verbs will enable you to optimize CPU resources and shape network traffic to deliver real world impact on AI performance metrics, as well as developing tools for gaining insight and visibility into network behavior. Meticulous analysis and rigour are key tenants of this role, harnessing that together with a deeply-understood mental model of the server, NIC, protocol, switch, and custom hardware behavior will enable you to lead network debug, optimize traffic patterns, and prescribe architectural changes.

Responsibilities

Develop x86 & ARM software to expose next-generation hardware IO capabilities for AI/HPC application teams
Govern a generic IO API with multiple internal users.
Develop control and configuration subsystems directly interacting with Cerebras hardware
Drive network performance debug of large AI clusters
Gather and analyze network statistics and packet traces to root cause and alleviate bottlenecks and sub-optimalities.
Develop tools/telemetry for increasing visibility into the network and IO datapath.
Optimize cpu/mem utilization leveraging kernel bypass and zero-copy techniques
Integrate leading edge networking technologies and protocols
Lead cross-functional technical projects spanning multiple teams and integrating diverse software and hardware components to deliver an improved network IO solution.
Foster clear and effective communication across teams and stakeholders.

Skills & Qualifications

Master's/PhD in Computer Science or Electrical Engineering + 1 year industry experience, OR 3+ years industry experience.
Experience in large software environments.
Embedded systems, HW/SW co-design, and some driver development.
Network protocol familiarity (TCP, RoCE) and network debug tools such as Wireshark, or willingness to learn
Some network switch environment familiarity or willingness to learn (Arista, Juniper, etc.).
Detail-oriented but keen to learn the bigger picture and step out of comfort zone to embrace the unknown.

Why Join Cerebras

About

People who are serious about software make their own hardware. At Cerebras, we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

Build a breakthrough AI platform beyond the constraints of the GPU.
Publish and open source their cutting-edge AI research.
Work on one of the fastest AI supercomputers in the world.
Enjoy job stability with startup vitality.
Our simple, non-corporate work culture that respects individual beliefs.

Find out more about what it's like to work at Cerebras here!

Apply today and become part of the forefront of groundbreaking advancements in AI!

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

This website or its third-party tools process personal data. For more details, click here to review our CCPA disclosure notice.

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More about this job

Responsibilities

Develop and maintain software and APIs that expose hardware I/O capabilities, configure Cerebras systems, and optimize network performance across large AI clusters. Analyze network statistics and packet traces, build visibility tools, and lead cross-functional efforts to improve network I/O solutions.

Requirements

Requires a master's or PhD in Computer Science or Electrical Engineering plus at least one year of industry experience, or at least three years of industry experience. Candidates should have experience in large software environments, embedded systems, hardware/software co-design, and some driver development, along with familiarity with TCP, RoCE, and network debugging tools or a willingness to learn.

Skills

Socket Programming
RDMA Verbs
TCP
RoCE
Network Debugging
Embedded Systems
Hardware/Software Co-Design
Driver Development
C/C++
Network Performance Optimization
Kernel Bypass
Zero-Copy Techniques
Packet Trace Analysis
Telemetry Development
Cross-Functional Project Leadership

Visa sponsorship

Not detected in the job text

Keywords

AI
High-Performance Computing
Host and Network I/O
Distributed Systems
x86
ARM
Socket Programming
RDMA Verbs
TCP
RoCE
Network Protocols
Network Switches
Arista
Juniper
Wireshark
Embedded Systems
Hardware/Software Co-Design
Driver Development
FPGA
ASIC
Kernel Bypass
Zero-Copy
Network Telemetry
Packet Traces
Bandwidth Optimization
Latency Optimization
CPU and Memory Optimization
Cerebras Wafer-Scale Engine
Cluster Networking

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