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Added 9 hours ago
OT
Sr. IT Software Developer
Open Text Corporation
Waterloo, ON
- Other
Develop server-side components and integrations using technologies such as Node.js, Python, Java, REST APIs, event-driven patterns, and relational or document databases.
Added 12 hours ago
ST
AI Engineer
SS&C Technologies
Mississauga, ON
- Full-time
10+ years of hands-on software development experience in Java and Python.
Added 13 hours ago
C
Full Stack Developer
CGI
Vancouver, BC
- Full-time
Hands on experience with back end application development using technologies such as: Java and Spring Boot Node.js / Express / NestJS C# / .NET Core Python based frameworks, as applicable
Added 13 hours ago
RI
Senior Full Stack Java Developer - Capital Markets
Rose International
Mississauga, ON
- Full-time
Expert-level proficiency in Java, including Core Java, Java 17+, Spring Boot, Spring Framework, microservices architecture, and REST/gRPC APIs, and/or strong production experience in Python…
Added 13 hours ago
LB
Senior Software Engineer, Agentic AI Products
Leo Berwick
Toronto, ON
- Full-time
Full-stack proficiency. You are strong in React, TypeScript, and Java, and comfortable picking up other languages, such as Python, as the work demands.
Added 14 hours ago
H
Production Support Specialist
Hays
Toronto, ON
- Contract
Experience with software development and automation initiatives using scripting languages such as Bash and Python or programming languages including C, C#, Java, Scala, and Go.
Added 15 hours ago
P
Manager Software Engineering
PointClickCare
Mississauga, ON
- $152,000 to $174,000 CAD / year
- Full-time
Strong background in Java, Python, Spring, SQL, and web technologies
Added 15 hours ago
A
CCaaS Developer
Accenture
Montreal, QC
- Full-time
Develop AWS Lambda functions and backend integrations in Python, Node.js, or Java.
Added 15 hours ago
Senior Software Engineer, Agentic AI Products
Leo Berwick
Toronto, ON
Full-stack proficiency. You are strong in React, TypeScript, and Java, and comfortable picking up other languages, such as Python, as the work demands.
Added 15 hours ago
C
ASIC Engineer Intern
Ciena
Ottawa, ON
- Full-time
Programming experience using one or more of Java, Python, TCL, Skill/Ocean, or SystemVerilog.

Ciena

ASIC Engineer Intern

Ottawa, ON, Canada

The hourly pay range for this position is $25.50 - $35.00. · Full-time

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Job details

Pay: The hourly pay range for this position is $25.50 - $35.00.
Job type: Full-time
Posting language: English
Posted: Oct 30, 2026

Original job description

As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work, and flexibility, Ciena supports growth and well-being - on and off the job. Connect with a career that matters.

The Opportunity: Work term of 4 months extendable to 8, starting in January 2027.

Ciena is seeking a student to contribute to the development and evolution of automation infrastructure used for next-generation ASIC devices. The role provides exposure to ASIC design, integration, layout, and verification activities within large-scale DSP ASIC development for optical communications. The position is aligned to a student’s experience, strengths, and technical interests.

How you will make an impact:

Contribute to the development of automation infrastructure for ASIC devices.
Collaborate with developers and team leads to advance ASIC design, layout, integration, and verification activities.
Develop design blocks and evaluate designs for correctness and performance.
Implement netlists into silicon-realizable layouts and automate placement and extraction workflows.
Create constraints, analyze implementation reports, and automate ASIC integration processes.
Develop reusable SystemVerilog/UVM verification components.
Enhance Python-based reporting, analysis, build, simulation, and debug workflows.

The must haves:

Programming experience using one or more of Java, Python, TCL, Skill/Ocean, or SystemVerilog.
Familiarity with Linux-based development environments.

Nice to haves:

Previous experience with ASIC or FPGA development programs.
Strong analytical and debugging skills.
Familiarity with Agile, JIRA, Confluence, and Git.

Pay Range:

The hourly pay range for this position is $25.50 - $35.00.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation pay as required by applicable laws.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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More about this job

Responsibilities

The intern will contribute to the development and evolution of automation infrastructure for next-generation ASIC devices. Responsibilities include collaborating on design, integration, layout, and verification activities while enhancing Python-based workflows.

Requirements

Candidates must have programming experience in languages such as Java, Python, TCL, or SystemVerilog and familiarity with Linux environments. Previous experience with ASIC or FPGA development programs is considered a strong asset.

Skills

Java
Python
TCL
Skill/Ocean
SystemVerilog
Linux
ASIC design
FPGA development
Debugging
Agile
JIRA
Confluence
Git
Verification
Layout
Integration

Benefits

Employee Assistance Program
Company-paid holidays
Paid sick leave
Vacation pay

Visa sponsorship

Not detected in the job text

Keywords

ASIC
DSP
Automation
Infrastructure
Optical communications
SystemVerilog
UVM
Python
Java
TCL
Linux
FPGA
Agile
JIRA
Confluence
Git
Netlists
Silicon
Verification
Layout
Integration
Debugging
Connectivity
Networking

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