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Added 12 mins ago
Project Manager, Sales Enablement & Executive Customer Engagement
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Full-time
At Husky TechnologiesTM, our success is based on your success. Our ability to keep our customers in the lead is based on building the strongest team possible.
Added 12 mins ago
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Ciena

Senior FPGA Verification Engineer

Ottawa, ON, Canada

Pay: Pay range: $103,700 - $165,700 CAD
Job type: Full-time
Experience: Experience: 8+ years of experience as an FPGA/ASIC verification engineer.
Posting language: English
Posted: Sep 24, 2026

Apply About employer

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Original job description

As the global leader in high-speed connectivity, Ciena builds the critical infrastructure powering the AI era. We’re a technology company shaping the future of networking, guided by innovation, integrity, and collaboration. Through development opportunities, meaningful work, and flexibility, Ciena supports growth and well-being - on and off the job. Connect with a career that matters.

This role provides an opportunity to lead FPGA verification efforts for complex chip-level designs that enable advanced networking solutions. The position contributes to verification strategy, quality, and delivery by driving robust verification methodologies and collaborating across engineering teams. Success in this role helps ensure reliable FPGA implementations that support Ciena’s innovation goals

How you will make an impact:

Lead chip-level verification activities for FPGA designs

Establish verification methodology, architecture, and infrastructure, including models, generators, monitors, and scoreboards.

Work with the design team to establish test priorities and coverage targets

Create verification plans.

Create and execute test cases.

Triage regressions, provide reports to the team, and drive bug resolution activities.

Collaborate with peers and mentor junior verification engineers on verification methodologies and best practices

The must haves:

Education: Bachelor's degree in Engineering or equivalent.

Experience: 8+ years of experience as an FPGA/ASIC verification engineer.

Experience developing testbench environments using SystemVerilog and UVM

Experience with directed and constrained-random stimulus generation.

Problem solving and debugging skills.

Application of standard interfaces including PCIe, I2C, and SPI

Experience with Siemens Questa and Synopsys VCS verification tools

Working knowledge of PC and Unix/Linux operating systems

Excellent verbal and written communication skills.

Ability to work independently and in a team environment.

Excellent interpersonal and team skills.

Highly motivated and creative.

Well organized, thorough, and detail oriented

Nice to haves:

Familiarity with OTN and Ethernet for data transport

Pay range: $103,700 - $165,700 CAD

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Apply About employer

More about this job

Responsibilities

Lead chip-level verification activities for FPGA designs and establish verification methodology, architecture, and infrastructure. Collaborate with design teams to define test priorities, create verification plans, and drive bug resolution through regression analysis.

Requirements

Requires a bachelor's degree in Engineering and 8+ years of experience in FPGA/ASIC verification. Must have proficiency in SystemVerilog, UVM, and standard interface protocols like PCIe, I2C, and SPI.

Skills

FPGA verification
ASIC verification
SystemVerilog
UVM
PCIe
I2C
SPI
Siemens Questa
Synopsys VCS
Linux
Unix
Testbench development
Constrained-random stimulus
Debugging
OTN
Ethernet

Benefits

Medical plan
Dental plan
Vision plan
DCPP with company matching
Employee Stock Purchase Program
Employee Assistance Program
Company-paid holidays
Paid sick leave
Vacation time
Paid family leave

Visa sponsorship

Not detected in the job text

Keywords

FPGA
ASIC
Verification
SystemVerilog
UVM
PCIe
I2C
SPI
Siemens Questa
Synopsys VCS
Linux
Unix
OTN
Ethernet
Chip-level design
Testbench
Regression
Debugging
Networking
Hardware engineering

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