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TC
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The proposed Resource must have the following qualifications/requirements:
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Staff FPGA Engineer
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- $184,000 to $222,000 CAD / year
- Full-time
…possible and translating cutting-edge ideas into production-grade systems, this is your…
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Project Manager - Drinking Water
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Coordinate projects involving municipal drinking water treatment plants, water reuse facilities, transmission systems, pumping stations, and storage infrastructure.
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Added 3 hours ago
Principal Network Architect
Rogers Communications
Toronto, ON · Brampton, ON
Strong background in wireless communications, RF engineering, propagation, antenna systems, and spectrum use.

Cognichip

Staff FPGA Engineer

Toronto, ON, Canada

$184,000 to $222,000 CAD / year · Full-time

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Job details

Pay: $184,000 to $222,000 CAD / year
Job type: Full-time
Apply by: Jan 29, 2027
Work location: We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote
Experience: 10-15 years of experience in RTL design, or a combination of design and verification
Posting language: English
Posted: Oct 23, 2026

Original job description

Job Title

Staff Chip Design Engineer - FPGA

Job Description

Staff FPGA Design Engineer

Why This Matters At Cognichip, we’re not just building AI - we’re redefining what’s possible at the nexus of silicon design and machine learning. As a Staff FPGA Design Engineer, you will fuse chip design expertise with cutting-edge ML to create the intelligent, end-to-end silicon design flows. If you thrive on pushing the envelope of the possible and translating cutting-edge ideas into production-grade systems, this is your stage.

What You'll Do

Serve as the domain expert, embedding chip design intuition into a team creating AI chip design assistants
Architect modern EDA workflows, from spec to bitstream
Drive the development of agentic AI systems capable of authoring syntactically and semantically correct RTL, manage IP integration, and constructing processor-based designs
Create an ecosystem of libraries, tools, agents, workflows, and benchmarks to increase design velocity
Design and synthesize high-quality, complex datasets (RTL, IP, constraints, failure modes) to train models on hardware physics and logic
Define rigorous verification standards and guide the agent in generating robust UVM testbenches, assertions and coverage models to ensure generated designs are correct-by-construction

What You Bring

Masters in Computer Science, Electrical Engineering, or a closely related field
10-15 years of experience in RTL design, or a combination of design and verification
Deep expertise with AMD/Xilinx (Vivado, Vitis) and Altera/Intel (Quartus) ecosystems, including SoC and complex IP integrations
Knowledge of industry-standard communication protocols (AXI, Ethernet, PCIe, DDR5, SPI, I2C, NoC, etc)
Proficiency in SystemVerilog, Python, and TCL
Excellent written and verbal communication skills, especially to convey chip design knowledge to software engineers and AI scientists
Comfortable working in a dynamic, research-heavy AI-oriented startup environment

Bonus Points

The following items are not required but are great bonuses:

Personal projects showcasing innovation, creativity, and continuous learning
Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
Demonstrated coursework or project experience in machine learning and/or deep learning

What It's Like Here

We’re a fast-moving AI startup with a collaborative, high-trust culture. You’ll work with top-tier engineers, scientists, and builders - solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you’re excited to build the future of engineering, you’ll feel right at home.

Logistics

This position is available in Toronto. We believe a mindmeld between engineers and scientists leads to our professional growth and to great products; we have a hybrid schedule with four days in office, one day remote.

How To Apply

Don’t meet every single requirement? Feel over-qualified? That’s okay - if you're excited about our mission, we’d still love to hear from you. We are growing fast and need a world class team of various experience levels.

Apply on LinkedIn About employer

More about this job

Responsibilities

Serve as the chip-design domain expert, architect EDA workflows, and help develop AI agents that generate RTL, integrate IP, and construct processor-based designs. Build datasets, tools, libraries, and benchmarks, and establish verification standards for generated designs, including UVM testbenches, assertions, and coverage models.

Requirements

Requires a master's degree in Computer Science, Electrical Engineering, or a related field, plus 10–15 years of RTL design or combined design and verification experience. Candidates should have deep experience with AMD/Xilinx and Intel FPGA ecosystems, protocol and IP integration, and proficiency in SystemVerilog, Python, and TCL.

Skills

FPGA Design
RTL Design
SystemVerilog
Python
TCL
AMD/Xilinx Vivado
AMD/Xilinx Vitis
Intel Quartus
SoC Integration
IP Integration
AXI
Ethernet
PCIe
DDR5
UVM Verification
Machine Learning

Visa sponsorship

Not detected in the job text

Keywords

FPGA
Chip Design
RTL Design
RTL Verification
SystemVerilog
Python
TCL
AMD/Xilinx
Vivado
Vitis
Intel Quartus
EDA Workflows
SoC Integration
IP Integration
AXI
Ethernet
PCIe
DDR5
SPI
I2C
Network-on-Chip
UVM
Testbenches
Assertions
Coverage Models
Synthesis
Agentic AI
Machine Learning
Deep Learning
Verilator

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Jobs in Canada