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Dexian

Verification Validation Engineer

Markham, ON, Canada

$80 to $90 CAD / hour · Contract

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Job details

Pay: $80 to $90 CAD / hour
Job type: Contract
Apply by: Dec 2, 2026
Experience: 10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;
Posting language: English
Posted: Nov 2, 2026

Original job description

Verification Engineer

Duration: 12 Months

Hrs/Wk: 40.00

Location :OTTAWA, ON K2K 3G3

JOB DUTIES:

Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects. Be familiar with hardware modeling and/or assertion-based verification methods.

EXPERIENCE AND EDUCATION:

10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;
Strong background in C/C++ development in a Linux Environment;Strong debug skills and experience with debug tools such as Gdb, Valgrin.
Proficient in Object Oriented programming, STL, computer architecture and data structures;Knowledge of Perl and Makefile.
Experience in Verilog/SystemVerilog/SystemC, preferred;Experience in C/Verilog environment using DPI/PLI, preferred.
Strong analytical skills and attention to detail;Excellent written and communication skills

Must Have Skillset:

UVM
System Verilog
Understanding of C/C++ programming
Need Design Verification, fine with FPGA Verification.

Dexian stands at the forefront of Talent + Technology solutions with a presence spanning more than 70 locations worldwide and a team exceeding 10,000 professionals. As one of the largest technology and professional staffing companies and one of the largest minority-owned staffing companies in the United States, Dexian combines over 30 years of industry expertise with cutting-edge technologies to deliver comprehensive global services and support.

Dexian connects the right talent and the right technology with the right organizations to deliver trajectory-changing results that help everyone achieve their ambitions and goals. To learn more, please visit https://dexian.com/.

Dexian is an Equal Opportunity Employer that recruits and hires qualified candidates without regard to race, religion, sex, sexual orientation, gender identity, age, national origin, ancestry, citizenship, disability, or veteran status.

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More about this job

Responsibilities

Verify complex ASIC or IP blocks for a combined CPU/GPU development effort, collaborating with design and verification engineers to validate functionality at the block, chip, and system levels. Document and execute directed and constrained-random simulation test plans, using established verification infrastructure and evolving industry methodologies.

Requirements

Requires 10+ years of verification experience on large ASIC projects or relevant software/firmware experience in hardware development, along with strong C/C++ skills in Linux and debugging experience. Candidates should be proficient in object-oriented programming, STL, computer architecture, and data structures; Verilog/SystemVerilog/SystemC and DPI/PLI experience are preferred, as are analytical, communication, and documentation skills.

Skills

UVM
SystemVerilog
C/C++
ASIC Verification
FPGA Verification
Functional Verification
Constrained-Random Testing
Directed Testing
Object-Oriented Programming
STL
Computer Architecture
Data Structures
Linux
GDB
Valgrind
Perl

Visa sponsorship

Not detected in the job text

Keywords

ASIC
IP Cores
CPU
GPU
UVM
SystemVerilog
Verilog
SystemC
C/C++
Linux
GDB
Valgrind
STL
Object-Oriented Programming
Computer Architecture
Data Structures
Perl
Makefiles
DPI
PLI
Functional Verification
Assertion-Based Verification
Hardware Modeling
Directed Testing
Constrained-Random Testing
Simulation
SoC
Test Plans
Design Verification
FPGA Verification

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