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DSP Firmware Engineer

  • Waterloo, ON, Canada

Base salary $120-160k CAD · Full-time

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Job details

Pay
Base salary $120-160k CAD
Job type
Full-time
Apply by
Experience
5+ years of experience with DSP: filter design, sampling, noise, closed-loop control
Posting language
English
Posted

Original job description

icspi is building the future of nanoscale imaging.

We’ve revolutionized atomic force microscopy (AFM) by miniaturizing it by a factor of 1,000,000x compared to traditional systems: integrating all the components of an AFM onto a single CMOS chip, called microAFM.

Our desktop instruments, powered by microAFM, have reset the expectations for nanoscale imaging and are used by scientists and engineers in over 40 countries to drive R&D and manufacturing in academia and industry.

Now we are using our technology to solve throughput-resolution gaps in the semiconductor industry: catching nanoscale defects to enable new processes and prolong Moore's Law.

Today, scanning a wafer with AFM would take about 70 years. By using thousands of microAFMs in parallel, we can scan a wafer in a matter of hours.

About the role

As DSP Firmware Engineer at icspi, you will design the real-time signal processing at the heart of our atomic force microscope system, enabling high performance and parallelization. 

We are looking for an experienced signal-processing engineer who will own the path from raw sensor signals to picometer-level measurements. That includes filtering and demodulation through to the control loops that drive our systems, scaling from a single channel to a massively parallel array. You will work closely with our hardware systems and MEMS teams to turn requirements into a working design, bringing the system to life on an FPGA.

The ideal candidate is a self-starter with a deep foundation in DSP and control theory, ready to write and own the RTL end-to-end.

What you'll do

  • Define the FPGA and signal-processing architecture: datapath structure, partitioning between FPGA and processor, interfaces, and a design that scales from one channel to many
  • Turn high-level requirements (noise floor, loop bandwidth, channel count) into a technical plan, then implement and verify it
  • Translate our existing C signal chain into fixed-point, pipelined, parameterized RTL
  • Design and implement DSP for acquisition and conditioning: decimation, FIR/IIR filtering, demodulation (I/Q or lock-in style), and PI control loops
  • Budget DSP slices, BRAM, and timing, and make the trade-offs as the array grows
  • Build bit-true models (Python or MATLAB) and testbenches, and verify hardware against them
  • Design and run experiments to characterize the system, tune filters and loops, and validate firmware
  • Set the engineering foundations for this part of the system: toolchain, version control, verification approach, documentation

Required experience

  • Bachelor’s Degree or higher in electrical, systems, or computer engineering
  • 5+ years of experience with DSP: filter design, sampling, noise, closed-loop control
  • Experience developing FPGA firmware for real-time signal processing or control
  • Experience taking firmware from bring-up through characterization on real hardware

Nice to have

  • Experience with lock-in amplifiers, synchronous detection, complex baseband, or Hilbert-transform methods
  • Experience with Kalman filtering, state estimation, or nonlinear control
  • Experience with multi-channel or array architectures and time-multiplexed data paths
  • Experience with precision instrumentation or low-noise analog front ends

Compensation

Compensation is determined based on your qualifications and experience, and includes:

  • Base salary $120-160k CAD
  • Stock options
  • Benefits (health, dental and health care spending account)

Working at icspi

We’re a hardware company that designs, manufactures and sells atomic force microscope systems. Our lab and office are located in Waterloo, Ontario, Canada.

More about this job

Responsibilities

Define and implement scalable FPGA signal-processing architecture, translating requirements and an existing C signal chain into parameterized, pipelined fixed-point RTL. Build models and verification tests, manage FPGA resource and timing trade-offs, and characterize hardware by tuning filters and control loops through experiments.

Requirements

Requires a bachelor's degree or higher in electrical, systems, or computer engineering, at least five years of DSP experience, and experience developing FPGA firmware for real-time signal processing or control. Candidates should also have experience bringing up firmware and characterizing it on real hardware; lock-in detection, state estimation, multi-channel architectures, and precision instrumentation are advantageous.

Skills

  • Digital Signal Processing
  • FPGA Firmware Development
  • RTL Design
  • Control Theory
  • Fixed-Point Arithmetic
  • FIR/IIR Filtering
  • Decimation
  • Demodulation
  • PI Control Loops
  • Bit-True Modeling
  • Hardware Verification
  • Python
  • MATLAB
  • Signal Acquisition
  • System Characterization
  • Low-Noise Instrumentation

Benefits

  • Stock Options
  • Health Benefits
  • Dental Benefits
  • Health Care Spending Account

Visa sponsorship

Not detected in the job text

Categories

  • Engineering
  • Technology
  • Science & Research
  • Manufacturing

Keywords

  • Digital Signal Processing
  • FPGA
  • RTL
  • Fixed-Point Arithmetic
  • Pipelined Design
  • Parameterized RTL
  • C
  • Python
  • MATLAB
  • FIR Filtering
  • IIR Filtering
  • Decimation
  • Demodulation
  • Lock-In Amplifier
  • I/Q Processing
  • PI Control
  • Control Theory
  • Bit-True Modeling
  • Testbenches
  • BRAM
  • DSP Slices
  • Timing Analysis
  • Signal Acquisition
  • Noise Floor
  • Closed-Loop Control
  • MEMS
  • Atomic Force Microscopy
  • MicroAFM
  • Semiconductor Industry
  • Precision Instrumentation

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