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Technology Lead- Analog Layout

  • Vancouver, BC, Canada

$90,450 to $136,500 CAD / year · Full-time

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Job details

Pay
$90,450 to $136,500 CAD / year
Job type
Full-time
Apply by
Education
Bachelor’s degree
Experience
At least 4 years of Information Technology experience.
Posting language
English
Posted

Original job description

Infosys is hiring for Analog layout. You will work along our layout engineers and RF designers to build detailed transistor-level layout of RF and analog circuit blocks including bandgap/bias/LDO, ADC/DAC, baseband filters, modulators, power amplifiers, PLL, LO generation, LNA, and Mixer. You will also be responsible to provide highly quality layout to pass our verification flows including extraction, DRC, LVS, and DFM checking. Layout quality will be reviewed for power/gnd routing, electromigration, signal path check, di Aerential and IQ matching, and signal coupling.

Required Qualifications:

  • Candidate must be located within commuting distance of Vancouver BC, Canada or be willing to relocate to the area. This position may require travel in Canada.
  • Bachelor’s degree or foreign equivalent required from an accredited institution. Will also consider three years of progressive experience in the specialty in lieu of every year of education.
  • At least 4 years of Information Technology experience.
  • Candidates authorized to work for any employer in the Canada without employer-based visa sponsorship are welcome to apply. Infosys is unable to provide immigration sponsorship for this role at this time.

Required Skills :

  • Minimum Qualifications • FinFET experience, N5/N3/N2 or more advanced.
  • 5+ Experience in custom RF/analog layout for analog or RF transceivers with extensive knowledge of deep sub-micron CMOS.
  • High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc.
  • Knowledge of CADENCE layout tools, like Virtuoso Layout XL. •
  • Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing.
  • Solid understanding of RC delay, electromigration, and coupling.
  • Understanding of guard rings, DNW, PN junctions, and advanced process eAects such as LOD, WPE, etc.
  • Excellent communication skills and able to co-work with designers.

The job may also entail sitting as well as working at a computer for extended periods of time. Candidates should be able to effectively communicate by telephone, email, and face to face.

Estimated annual compensation range for the candidate based in the below location will be:

BC- $90450 to $ 136500

About Us

Infosys is a global leader in next-generation digital services and consulting. We enable clients in more than 50 countries to navigate their digital transformation. With over four decades of experience in managing the systems and workings of global enterprises, we expertly steer our clients through their digital journey. We do it by enabling the enterprise with an AI-powered core that helps prioritize the execution of change. We also empower the business with agile digital at scale to deliver unprecedented levels of performance and customer delight. Our always-on learning agenda drives their continuous improvement through building and transferring digital skills, expertise, and ideas from our innovation ecosystem.

EEO

Infosys provides equal employment opportunities to applicants and employees without regard to race; color; sex; gender identity; sexual orientation; religious practices and observances; national origin; pregnancy, childbirth, or related medical conditions; status as a protected veteran or spouse/family member of a protected veteran; or disability.

More about this job

Responsibilities

You will build detailed transistor-level layouts for RF and analog circuit blocks while ensuring high-quality verification through extraction, DRC, LVS, and DFM checking. The role involves collaborating with layout engineers and RF designers to review layout quality regarding routing, matching, and signal integrity.

Requirements

Candidates must have at least 4 years of IT experience, including 5 years of custom RF/analog layout experience with deep sub-micron CMOS and FinFET technology. A bachelor's degree or equivalent is required, and candidates must be authorized to work in Canada without visa sponsorship.

Skills

  • Analog layout
  • RF design
  • FinFET
  • Deep sub-micron CMOS
  • Calibre DRC
  • ERC
  • LVS
  • Cadence Virtuoso Layout XL
  • Device matching
  • RF shielding
  • High frequency routing
  • RC delay
  • Electromigration
  • Signal coupling
  • Guard rings
  • DNW

Visa sponsorship

Not detected in the job text

Categories

  • Technology
  • Engineering
  • Consulting
  • Software

Keywords

  • Analog Layout
  • RF Design
  • FinFET
  • CMOS
  • Calibre
  • DRC
  • LVS
  • Cadence Virtuoso
  • Transistor-level
  • Bandgap
  • LDO
  • ADC
  • DAC
  • Baseband filters
  • Modulators
  • Power amplifiers
  • PLL
  • LNA
  • Mixer
  • Electromigration
  • Parasitics
  • RF shielding
  • DNW
  • PN junctions
  • LOD
  • WPE
  • Information Technology
  • Consulting
  • Digital transformation
  • Engineering

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