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Sr. Staff/Staff Engineer, Digital Design
- Vancouver, BC, Canada
Full-time
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Job details
- Job type
- Full-time
- Closing date
- Posting language
- English
- Posted
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About InnoPhase IoT
If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of work--not just singing the same song every day, you'll find your playground at Innophase IoT.
We are looking for people seeking AWESOMENESS! If you're good at what you do, you can work anywhere. If you're the best at what you do, come work at Innophase IoT!
As a Sr. Staff/Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communication. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions, the team supports other disciplines with work product such as Verilog stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing.
Key Responsibilities
If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of work--not just singing the same song every day, you'll find your playground at Innophase IoT.
We are looking for people seeking AWESOMENESS! If you're good at what you do, you can work anywhere. If you're the best at what you do, come work at Innophase IoT!
As a Sr. Staff/Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communication. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications. In addition to delivering high quality digital solutions, the team supports other disciplines with work product such as Verilog stimulus files, test benches for device bring up/characterization, test vectors for product manufacturing.
Key Responsibilities
- Contribute to SoC architecture development for high-performance low-power IoT devices
- Employ skills in SystemVerilog, Python, Tcl, UPF to bring designs from concept through architecture to silicon and, finally, high-volume production
- Work cross-functionally with Systems/RF/software/firmware/verification/validation/operations teams
- Support schedule and resource planning to deliver products to market on time
- Help to define digital/system design and implementation methodologies and test strategies and flows
- Theoretical and practical knowledge of SoC architectures employing embedded processors
- Familiarity with common bus architectures like AXI/AHB/APB/OBI
- Deep RTL design knowledge (SystemVerilog)
- Experience with multi-clock and multi-power domain systems and strategies to control and minimize power consumption
- Understanding of timing constraints, static timing analysis and timing closure
- Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security.
- MS/PhD EE/CS preferred
- You have an engineering mindset, and you believe that communication is key to growing a team stronger
- Able to work effectively with incomplete or changing requirements
More about this job
Responsibilities
Contribute to architecture and digital design of high-performance, low-power IoT SoCs, taking products from concept through silicon and high-volume production. Collaborate across engineering and operations teams, support planning and product bring-up, and help define design methodologies, implementation flows, and test strategies.
Requirements
Requires strong SoC architecture and SystemVerilog RTL design knowledge, familiarity with common bus architectures, and experience with multi-clock and multi-power-domain systems, power control, timing constraints, static timing analysis, and timing closure. Experience with Arm TrustZone, device lifecycle states, Secure Boot, and PSA Certified Level 2+ security is sought; an MS or PhD in EE/CS is preferred.
Skills
- SoC Architecture
- SystemVerilog
- RTL Design
- Python
- Tcl
- UPF
- Embedded Processors
- AXI/AHB/APB/OBI Bus Architectures
- Multi-Clock Systems
- Multi-Power-Domain Design
- Power Optimization
- Static Timing Analysis
- Timing Closure
- Arm TrustZone
- Secure Boot
- PSA Certified Security
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Software
- Manufacturing
Keywords
- SoC
- Digital Design
- IoT
- Connectivity
- Communication
- SystemVerilog
- Python
- Tcl
- UPF
- RTL
- Embedded Processors
- AXI
- AHB
- APB
- OBI
- Multi-Clock Systems
- Multi-Power-Domain Systems
- Power Consumption Optimization
- Timing Constraints
- Static Timing Analysis
- Timing Closure
- Arm TrustZone
- Device Lifecycle States
- Secure Boot
- PSA Certified Level 2+
- Verilog
- Test Benches
- Test Vectors
- Device Bring-Up
- Product Characterization