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IC
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Intel Corporation

GPU Validation Engineer

Toronto, ON, Canada
CAN - - Toronto, Canada

CAD 153,910.00-217,280.00 · Full-time

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Job details

Pay: CAD 153,910.00-217,280.00
Job type: Full-time
Posting language: English
Posted: Nov 5, 2026

Original job description

Job Details:

Job Description:

Join a leading technology company at the forefront of innovation in graphics processing and semiconductor technology. We are committed to pushing the boundaries of what’s possible in the world of computing, delivering cutting-edge solutions that power the future of digital experiences. Our team is composed of talented professionals who are passionate about technology and dedicated to excellence. We are seeking a skilled and experienced GPU Validation Engineer to join our dynamic team. This role requires regular onsite presence to effectively collaborate with cross-functional teams and fulfill essential job responsibilities.

As a GPU Validation Engineer, you will define, develop, and perform functional validation for Graphics Processing Units (GPUs), focusing on the interaction of GPUs with media, display, and system-level features.

You will apply various hardware and software tools and techniques to ensure comprehensive validation coverage and achieve performance, power, and area goals.

Key Responsibilities

Define, develop, and execute functional validation plans for GPUs, focusing on Design for Debug, Fabric, media, display, and system-level features.
Apply hardware and software tools to ensure validation coverage and meet performance, power, and area objectives.
Review proposed design changes to assess their impact on validation plans, tasks, and timelines.
Develop GPU validation methodologies and collaborate with engineers for design optimization, troubleshooting, and failure analysis.
Perform silicon debug to identify root causes and resolve functional and triage failures for GPU issues.
Test interactions between various GPU features using validation infrastructure.
Develop post-silicon validation infrastructure, including performance monitors, behavioral checkers, and state space coverage.
Publish GPU validation reports summarizing all validation activities, review results, and communicate findings to relevant teams.
Proactive approach to identifying potential challenges and developing solutions.
Strong organizational skills to manage multiple validation tasks and timelines efficiently.
Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
Develops GPU validation methodologies, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
Performs silicon debug to identify root causes and resolves all functional and triage failures for GPU issues. Tests interactions between various GPU features using validation infrastructure.
Develops post silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
Publishes GPU validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams.
Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for graphics interfaces and to meet desired product specifications.
Work with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategies, methodologies, and processes for graphics interfaces.

The ideal candidate should show the following behavioral traits

Strong analytical and problem-solving skills to effectively troubleshoot and resolve complex GPU issues.
Excellent communication skills to clearly convey validation findings and collaborate with cross-functional teams.
Skills to work collaboratively in a team environment, fostering a culture of innovation and continuous improvement.
Strong attention to detail to ensure thorough validation coverage and accurate reporting.
Adaptability and flexibility to manage changing priorities and work effectively under pressure.

If you are passionate about cutting-edge GPU technology and eager to shape the future of graphics processing, we invite you to apply for this exciting opportunity. Join us in driving innovation and excellence in GPU validation.

Apply now to become a part of our talented team and contribute to the next generation of digital experiences.

Qualifications:

Minimum Qualifications, you must possess the below minimum qualifications to be initially considered for this position.

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree.

8+ years of industry experience in:

- System Verilog (SV)/ Universal Verification Methodology (UVM) based pre-silicon validation
- SoC/Subsystem Pre-Silicon Verification focusing on Design for Debug (DFD)/ SoC Fabric/boot/reset/PM functions..

This position is not eligible for Intel immigration sponsorship.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 6+ years of industry experience.

3+ years of experience with:

- Driving pre-silicon validation as technical lead as well as working as Individual contributor.
- GPU pre-silicon validation.
- Validation of Design for Debug Features

Job Type:

Experienced Hire

Shift:

Shift 1 (Canada)

Primary Location:

Canada, Toronto

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Annual Salary Range for jobs which could be performed in Canada

CAD 153,910.00-217,280.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Canada Accommodation:

Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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More about this job

Responsibilities

Define, develop, and execute functional validation plans for GPUs, focusing on design for debug, fabric, media, and system-level features. Perform silicon debug to identify root causes and collaborate with cross-functional teams to optimize design and validation methodologies.

Requirements

Requires a bachelor's degree in a STEM field and at least 8 years of industry experience in System Verilog/UVM-based pre-silicon validation. Candidates must demonstrate strong analytical skills and experience with SoC/Subsystem verification.

Skills

GPU Validation
System Verilog
UVM
SoC Verification
Design for Debug
Silicon Debug
Performance Monitoring
Behavioral Checkers
Graphics Processing
Semiconductor Technology
Troubleshooting
Failure Analysis
Validation Planning
Cross-functional Collaboration
Technical Leadership

Visa sponsorship

Not detected in the job text

Keywords

GPU
Validation Engineer
System Verilog
UVM
SoC
Subsystem
Design for Debug
DFD
Fabric
Silicon Debug
Semiconductor
Graphics Processing
Performance Monitors
Behavioral Checkers
State Space Coverage
Troubleshooting
Failure Analysis
Validation Infrastructure
Pre-silicon
Post-silicon
Engineering
Computer Science
Electrical Engineering
STEM
Technical Lead

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