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Added 1 min ago
SM
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Sr/Staff Digital Design Engineer
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Exposure to silicon photonics (SiPh), optical compute/interconnect architectures, or electro-optic interface integration.
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Lightmatter

Sr/Staff Digital Design Engineer

Toronto, ON, Canada

$123,000 - $175,000 USD

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Job details

Pay: $123,000 - $175,000 USD
Experience: At least 5 years of experience in ASIC design or a similar high-speed chip design with multiple successful tape outs
Posting language: English
Posted: Nov 6, 2026

Original job description

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!

If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.

Lightmatter is (re)inventing the future of computing with light!

We are hiring a Digital Design Engineer to help develop an ASIC for the next-generation artificial intelligence computing architecture alongside a team of world-class scientists and engineers. If your passion is innovation, solving challenging technical problems, and doing impactful work, you should join our team and help build the world's first optical computers!

Responsibilities

Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development
Debug complex logic and mixed signal simulations
Understand and integrate silicon photonic communication and compute technology into digital accelerator design
Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced technology nodes
Create design specifications and documentation to facilitate collaboration with partner teams
Generate documentation for modules, including functionality and timing
Manage RTL implementation to achieve functionally correct, performant designs within project schedules by identifying, communicating and mitigating risks.

Qualifications

Bachelor’s degree in Electrical or Computer Engineering (or related fields)
At least 5 years of experience in ASIC design or a similar high-speed chip design with multiple successful tape outs
Proficiency in SystemVerilog or Verilog for digital logic design
Proven experience debugging complex logic and mixed-signal simulations using industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, Questa, or equivalent mixed-signal co-simulation environments)
Demonstrated track record of delivering high-performance, low-power digital designs in advanced semiconductor process nodes

Preferred Qualifications

Master's degree in Electrical or Computer Engineering (or related fields)
Experience in communication protocols (e.g. PCIe)
Knowledge of processor design, accelerators, and/or memory hierarchies
Exposure to silicon photonics (SiPh), optical compute/interconnect architectures, or electro-optic interface integration.
Strong scripting skills in Python, Perl, Tcl, or Bash to automate simulation and design workflows.
Experience interfacing digital logic directly with analog mixed-signal (AMS) IP (e.g., SerDes, ADCs/DACs, optical transceivers)

We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.

Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.

$123,000 - $175,000 USD

Benefits

Comprehensive Health Care Plan (Medical, Dental & Vision)
Retirement Savings Matching Program
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short Term & Long Term Disability
Training & Development
Commuter Benefits
Flexible, hybrid workplace model
Equity grants (applicable to full-time employees)

Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.

Export Control

Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.

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More about this job

Responsibilities

Develop and manage SystemVerilog RTL modules for an advanced ASIC, including design-for-test considerations, simulation debugging, specifications, and documentation. Collaborate across architecture, verification, physical design, photonics, analog, and software teams to integrate photonic technologies and deliver functionally correct, high-performance, low-power designs on schedule.

Requirements

Requires a bachelor's degree in Electrical or Computer Engineering or a related field, at least five years of ASIC or similar high-speed chip design experience, and multiple successful tape-outs. Candidates should be proficient in Verilog or SystemVerilog, experienced with complex logic and mixed-signal simulation using industry-standard EDA tools, and have a record of delivering advanced-node, high-performance, low-power digital designs.

Skills

SystemVerilog
Verilog
ASIC Design
RTL Design
Design for Test
Mixed-Signal Simulation
EDA Tools
Silicon Photonics
Digital Accelerators
PCIe
Processor Design
Memory Hierarchies
Python
Perl
Tcl

Benefits

Medical Insurance
Dental Insurance
Vision Insurance
Retirement Savings Matching
Life Insurance
Paid Time Off
Paid Family Leave
Short-Term Disability
Long-Term Disability
Training and Development
Commuter Benefits
Equity Grants

Visa sponsorship

Not detected in the job text

Keywords

ASIC
RTL
SystemVerilog
Verilog
Design for Test
Mixed-Signal Simulation
Synopsys VCS
Cadence Xcelium
Questa
EDA Tools
Digital Logic
Silicon Photonics
Optical Computing
Optical Interconnects
Digital Accelerators
Advanced Semiconductor Nodes
High-Performance Design
Low-Power Design
PCIe
Processor Design
Memory Hierarchies
Python
Perl
Tcl
Bash
SerDes
ADC
DAC
Optical Transceivers
Tape-Out

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