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LMI Technologies

Senior Hardware Engineer

Burnaby, BC, Canada

$108,000 to $153,000 CAD / year · Full-time

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Job details

Pay: $108,000 to $153,000 CAD / year
Job type: Full-time
Apply by: Nov 11, 2026
Experience: Minimum 5+ years relevant experience designing and testing digital logic (FPGA or ASIC)
Posting language: English
Posted: Aug 13, 2026

Original job description

LMI is seeking a talented Senior Hardware (FPGA) engineer to join a multi-disciplinary engineering team. The successful candidate will have a proven record in developing complex FPGA code for an embedded environment. The candidate will be responsible for FPGA designs for a distributed system which includes machine vision, cameras, laser drivers, high speed communication channels and image processing. The candidate will be involved in the complete FPGA development cycle, from design to simulation, release and support.

Lead the design and implementation of high-performance RTL using VHDL, Verilog and SystemVerilog
Define FPGA architecture and micro-architecture specifications based on system-level requirements
Collaborate with other teams in the technology department to define HW/SW interfaces and memory maps.
Select appropriate FPGA vendors (Xilinx/AMD, Intel, Microchip) and specific chip families based on project needs.
Design and maintain self-checking testbenches using SystemVerilog/UVM or VHDL/OSVVM to ensure high functional coverage.
Implement constrained random stimulus generation to uncover complex corner cases that manual directed tests might miss.
Deeply analyze data sheets from FPGA vendors and external component providers (ADCs, DACs, PHYs) to verify timing, voltage, and power compatibility.
Mentor other engineers through code reviews and technical guidance.
Conduct feasibility studies for new features or hardware platforms.
Interface with vendors to resolve tool-specific bugs or procure IP cores.

Education and Qualifications

Bachelor Degree in Electrical Engineering
P.Eng designation or working towards it would be desirable
Minimum 5+ years relevant experience designing and testing digital logic (FPGA or ASIC)
Hands-on experience designing with VHDL and/or Verilog complex systems with multiple clock-domains, high speed interfaces (LVDS, PCIe, memories, MIPI, MGT) and data processing cores is required.
Hands-on experience with self-verifying simulation environments and techniques
Strong ability in tracking and identifying FPGA problems (logic, timing, implementation, synchronization)
Experience with HW debugging tools (logic analyzers, Chipscope)
Experience in translating high level requirements into an architecture, considering aspects like resource/power use, performance, ease of maintenance, compatibility and design partitioning into modules or hardware and SW functions.
Able to produce solid designs in a fast-paced environment
Passionate for leading edge technology, out of the box thinking and its challenges
Capable of working in small teams and be accountable for your performance and documentation

Nice to have:

Xilinx’ Zynq7K and MP, AXI interfaces, Xilinx IP, Vivado, Xilinx ISE, and Chipscope for FPGA development
FPGA/SoCs from other vendors (Intel, Lattice)
Image processing and machine vision concepts
AI concepts and coding tools (Claude, Gemini)
Designs incorporating soft core CPUs: Microblaze, Picoblaze
Higher level design languages (System Verilog, System C) and tools or flows (i.e. Vivado HDL)
Verification (UVM)
Other languages: TCL, C/C++
Experience with Oscilloscopes and Logic Analyzers for development and debugging

Salary Range: $108,000 - $153,000 + Eligibility for Profit Sharing Program Participation (pending successful completion of probationary period and based on business performance)

Perks and Benefits

Health Benefits: Full health care coverage (with 100% paid premiums) including dental, vision, and drugs for you and your family.
Work-Life Balance: We support a healthy balance with hybrid work arrangements, flextime, and competitive paid time off.
Growth & Development: An annual Education Support Program for training and professional growth, plus annual performance reviews.
Enjoy free snacks and drinks, team-building events, tenure awards, and our official "May the 4th" (Star Wars Day) company holiday!
Access to an on-site fitness facility, tennis/basketball court, and company-wide wellness initiatives
This is a hybrid position based out of our Burnaby, BC headquarters. To support our collaborative model, preference will be given to local candidates that are able to work in the office on Tuesdays, Wednesdays and Thursdays.
We are recognized as a “Great Place to Work” for 10 consecutive years!

Our Recruitment Process

While we appreciate your interest in LMI very much, we are only able to respond to candidates selected for further consideration.

We believe in a transparent and collaborative hiring journey. Our goal is to ensure you are as excited about us as we are about you. Below is the typical path (can vary by position):

Talent Discovery (Human Resources): An initial screening call focused on your professional background, language and communication proficiency, and cultural alignment with the team as well as overview of role and company.
Role Fit (Hiring Manager): A deep dive into your experience, knowledge and skills as well as sharing of role expectations and team initiatives.
Team Fit (Peers and Colleagues): An opportunity to meet with potential team members and/or cross-functional peers to discuss your experience/background and their experience and work at LMI.
Assessment: Some roles may entail a technical assessment to further discover your technical capabilities and skills.

About LMI Technologies

We are recognized as one of Canada's Great Workplaces and a global leader in industrial vision. LMI is a medium-sized technology company built on a culture of openness, respect and engineering excellence. At LMI, our teams work collaboratively toward the shared goal of designing and delivering innovative 3D and 2D machine vision solutions to OEMs and System Integrators operating in industrial factory automation worldwide. The result of this collaboration is high-performance, easy-to-deploy, and cost-effective vision technologies that deliver consistent results in even the most demanding inline inspection applications today worldwide reliably.

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More about this job

Responsibilities

The candidate will lead the design and implementation of high-performance RTL for complex FPGA-based distributed systems including machine vision and image processing. They are responsible for the complete development cycle, from architecture definition and simulation to hardware debugging and vendor collaboration.

Requirements

The role requires a Bachelor's degree in Electrical Engineering and a minimum of 5 years of experience in digital logic design. Proficiency in VHDL/Verilog, hardware debugging tools, and experience with high-speed interfaces and simulation environments are essential.

Skills

FPGA design
RTL
VHDL
Verilog
SystemVerilog
UVM
Machine vision
Embedded systems
Digital logic
Hardware debugging
Timing analysis
Constraint random stimulus
High speed interfaces
Micro-architecture
Data processing
Circuit design

Benefits

Health care coverage
Dental insurance
Vision insurance
Drug coverage
Hybrid work arrangements
Flextime
Paid time off
Education support program
Profit sharing program
On-site fitness facility
Tenure awards

Visa sponsorship

Not detected in the job text

Keywords

FPGA
RTL
VHDL
Verilog
SystemVerilog
UVM
OSVVM
Machine Vision
Embedded Systems
Xilinx
Intel
Microchip
LVDS
PCIe
MIPI
MGT
Vivado
Chipscope
Digital Logic
ASIC
Hardware Debugging
Image Processing
TCL
C++
Microblaze
Picoblaze
AXI
Constraint Random Stimulus
Functional Coverage
Industrial Automation

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