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Added 1 min ago
LH
Physiotherapist
Lifemark Health Group
St. Catharines, ON
- $36.92 to $54.14 CAD / hour
- Full-time
Stay current with best practices through continuous learning and professional development.
Added 1 min ago
LC
System Technologist, Process Controls
Lactalis Canada
Belleville, ON
- Full-time
…to the established plant policies and procedures. Lead the development of new applications or the development of major changes to existing applications (e.g. Develop a Condition Based…
Added 1 min ago
SM
Medical Radiation Technologist (CT & X-Ray)
Stevenson Memorial Hospital
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- Internship
Communicates issues and concerns to the Manager.
Added 1 min ago
AU
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Brantford, ON
- $19 CAD / hour
- Part-time
Shifts: Position 1: Thursdays & Fridays | 6am to 6pm | Day Shifts · Position 2: Saturdays & Sundays | 6:30am to 5:30pm | Day Shifts
Added 1 min ago
CO
Temporary Technical Lead (Housing Accelerator Fund) Up to 18 Months
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- Temporary
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Added 1 min ago
CO
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Added 16 mins ago
SM
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Added 16 mins ago
SH
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Added 16 mins ago
BH
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Added 16 mins ago
LT
Senior Hardware Engineer
LMI Technologies
Burnaby, BC
- Full-time
…processing. The candidate will be involved in the complete FPGA development cycle, from design to simulation, release and…
Added 16 mins ago
SM
Medical Radiation Technologist (CT & X-Ray)
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Added 16 mins ago
SH
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Added 16 mins ago
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- Full-time
Reporting to the Vice President, Corporate Services & Chief Financial Officer, the Manager, Finance, Performance and Analytics supports the hospital's strategic objectives, performance…
Added 31 mins ago
HT
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- Full-time
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Added 31 mins ago
SD
Assistant Front Store Manager, Hourly Full Time Flexible Shifts
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To assist the Front Store Manager (FSM) in managing the human, physical and financial resources of the store and in ensuring that store objectives are achieved by focusing on improving…
Added 31 mins ago
KC
Kitchener-Waterloo Office - Opportunities in Audit - Co-op/Intern Summer 2027 - Wilfrid Laurier University
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All considered applicants must have or will obtain legal authorization to work in Canada by the start date of employment
Added 46 mins ago
S
Talent Advisor, AI Labs
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- Full-time
…about LLMs, deep learning, NLP, computer vision, and model development…
Added 46 mins ago
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Added 1 hour ago
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…our guests’ and athletes’. As the Advanced Innovation – Sr. Manager Concept Creation, you will be responsible for leading and managing the Concept Creation team, who are responsible for the…

Senior Hardware Engineer

Burnaby, BC, Canada

Salary Range: $108,000 - $153,000 + Eligibility for Profit Sharing Program Participation (pending successful completion of probationary period and based on business performance) Perks and Benefits · Full-time

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Job details

Pay: Salary Range: $108,000 - $153,000 + Eligibility for Profit Sharing Program Participation (pending successful completion of probationary period and based on business performance) Perks and Benefits
Job type: Full-time
Apply by: Mar 7, 2027
Experience: Minimum 5+ years relevant experience designing and testing digital logic (FPGA or ASIC)
Posting language: English
Posted: Oct 19, 2026

Original job description

LMI is seeking a talented Senior Hardware (FPGA) engineer to join a multi-disciplinary engineering team. The successful candidate will have a proven record in developing complex FPGA code for an embedded environment. The candidate will be responsible for FPGA designs for a distributed system which includes machine vision, cameras, laser drivers, high speed communication channels and image processing. The candidate will be involved in the complete FPGA development cycle, from design to simulation, release and support.

Lead the design and implementation of high-performance RTL using VHDL, Verilog and SystemVerilog
Define FPGA architecture and micro-architecture specifications based on system-level requirements
Collaborate with other teams in the technology department to define HW/SW interfaces and memory maps.
Select appropriate FPGA vendors (Xilinx/AMD, Intel, Microchip) and specific chip families based on project needs.
Design and maintain self-checking testbenches using SystemVerilog/UVM or VHDL/OSVVM to ensure high functional coverage.
Implement constrained random stimulus generation to uncover complex corner cases that manual directed tests might miss.
Deeply analyze data sheets from FPGA vendors and external component providers (ADCs, DACs, PHYs) to verify timing, voltage, and power compatibility.
Mentor other engineers through code reviews and technical guidance.
Conduct feasibility studies for new features or hardware platforms.
Interface with vendors to resolve tool-specific bugs or procure IP cores.

Education and Qualifications

Bachelor Degree in Electrical Engineering
P.Eng designation or working towards it would be desirable
Minimum 5+ years relevant experience designing and testing digital logic (FPGA or ASIC)
Hands-on experience designing with VHDL and/or Verilog complex systems with multiple clock-domains, high speed interfaces (LVDS, PCIe, memories, MIPI, MGT) and data processing cores is required.
Hands-on experience with self-verifying simulation environments and techniques
Strong ability in tracking and identifying FPGA problems (logic, timing, implementation, synchronization)
Experience with HW debugging tools (logic analyzers, Chipscope)
Experience in translating high level requirements into an architecture, considering aspects like resource/power use, performance, ease of maintenance, compatibility and design partitioning into modules or hardware and SW functions.
Able to produce solid designs in a fast-paced environment
Passionate for leading edge technology, out of the box thinking and its challenges
Capable of working in small teams and be accountable for your performance and documentation

Nice to have:

Xilinx’ Zynq7K and MP, AXI interfaces, Xilinx IP, Vivado, Xilinx ISE, and Chipscope for FPGA development
FPGA/SoCs from other vendors (Intel, Lattice)
Image processing and machine vision concepts
AI concepts and coding tools (Claude, Gemini)
Designs incorporating soft core CPUs: Microblaze, Picoblaze
Higher level design languages (System Verilog, System C) and tools or flows (i.e. Vivado HDL)
Verification (UVM)
Other languages: TCL, C/C++
Experience with Oscilloscopes and Logic Analyzers for development and debugging

Salary Range: $108,000 - $153,000 + Eligibility for Profit Sharing Program Participation (pending successful completion of probationary period and based on business performance)
Perks and Benefits

Health Benefits: Full health care coverage (with 100% paid premiums) including dental, vision, and drugs for you and your family.
Work-Life Balance: We support a healthy balance with hybrid work arrangements, flextime, and competitive paid time off.
Growth & Development: An annual Education Support Program for training and professional growth, plus annual performance reviews
Enjoy free snacks and drinks, team-building events, tenure awards, and our official "May the 4th" (Star Wars Day) company holiday!
Access to an on-site fitness facility, tennis/basketball court, and company-wide wellness initiatives
This is a hybrid position based out of our Burnaby, BC headquarters. To support our collaborative model, preference will be given to local candidates that are able to work in the office on Tuesdays, Wednesdays and Thursdays.
We are recognized as a “Great Place to Work” for 10 consecutive years!

Our Recruitment Process

While we appreciate your interest in LMI very much, we are only able to respond to candidates selected for further consideration.

We believe in a transparent and collaborative hiring journey. Our goal is to ensure you are as excited about us as we are about you. Below is the typical path (can vary by position):

Talent Discovery (Human Resources): An initial screening call focused on your professional background, language and communication proficiency, and cultural alignment with the team as well as overview of role and company.
Role Fit (Hiring Manager): A deep dive into your experience, knowledge and skills as well as sharing of role expectations and team initiatives.
Team Fit (Peers and Colleagues): An opportunity to meet with potential team members and/or cross-functional peers to discuss your experience/background and their experience and work at LMI.
Assessment: Some roles may entail a technical assessment to further discover your technical capabilities and skills.

About LMI Technologies

We are recognized as one of Canada's Great Workplaces and a global leader in industrial vision. LMI is a medium-sized technology company built on a culture of openness, respect and engineering excellence. At LMI, our teams work collaboratively toward the shared goal of designing and delivering innovative 3D and 2D machine vision solutions to OEMs and System Integrators operating in industrial factory automation worldwide. The result of this collaboration is high-performance, easy-to-deploy, and cost-effective vision technologies that deliver consistent results in even the most demanding inline inspection applications today worldwide reliably.

#LMISJ

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More about this job

Responsibilities

Lead FPGA architecture and high-performance RTL design for embedded distributed systems involving machine vision, cameras, laser drivers, high-speed communications, and image processing. Own the FPGA development lifecycle from design and verification through release and support, while collaborating across teams, mentoring engineers, and resolving vendor or tool issues.

Requirements

Requires a bachelor's degree in Electrical Engineering and at least five years of relevant digital logic design and testing experience; a P.Eng designation or progress toward one is desirable. Candidates need hands-on VHDL and/or Verilog experience with complex multi-clock systems and high-speed interfaces, self-verifying simulation, FPGA debugging, and the ability to translate system requirements into maintainable hardware architectures.

Skills

FPGA Design
VHDL
Verilog
SystemVerilog
RTL Design
FPGA Architecture
UVM Verification
Self-Checking Testbenches
Constrained-Random Testing
High-Speed Interfaces
Multi-Clock-Domain Design
Image Processing
Machine Vision
Hardware Debugging
Timing Analysis
HW/SW Interface Design

Benefits

Health Insurance
Dental Insurance
Vision Insurance
Prescription Drug Coverage
Hybrid Work Arrangements
Flexible Working Hours
Paid Time Off
Education Support Program
Annual Performance Reviews
Free Snacks And Drinks
Team-Building Events
Tenure Awards
Company Holiday
On-Site Fitness Facility
Tennis And Basketball Court
Wellness Initiatives
Profit Sharing

Visa sponsorship

Not detected in the job text

Keywords

FPGA
VHDL
Verilog
SystemVerilog
RTL
UVM
OSVVM
Xilinx
AMD
Intel
Microchip
Lattice
Vivado
Xilinx ISE
Chipscope
AXI
Zynq-7000
MicroBlaze
Picoblaze
SystemC
TCL
C/C++
PCIe
LVDS
MIPI
MGT
Image Processing
Machine Vision
Embedded Systems
Oscilloscopes

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