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Added 2 mins ago
Business Development Manager
Sysco
Vancouver, BC · Sysco Vancouver
Full-time
…business. By utilizing a team-selling approach, the Business Development Manager (BDM) will engage a cross-functional team to create a comprehensive strategy that meets the prospect’s…
Added 2 mins ago
Technician, Structures
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Full-time
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Added 2 mins ago
Financial Consultant - Rivers
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Added 16 mins ago
Registered Nurse
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Added 16 mins ago
Registered Nurse
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Registered Psychiatric Nurse - Continuing Care
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We invest in training & development of our people.
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Senior Electrical Engineer
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Proposal Manager
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Pre-Owned Sales Manager - 401 Dixie Hyundai
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Added 17 mins ago
Parts Manager - Sherwood Park Hyundai
AutoCanada Inc.
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The Parts Manager is responsible for overseeing the procurement, inventory management, and distribution of automotive parts within an organization. You'll work closely with suppliers,…
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Marvell Technology

Engineering IP Program Manager, Sr. Principal

Toronto, ON, Canada
Greater Toronto Area, Canada, Canada

Job type: Full-time
Apply by: Oct 25, 2026
Experience: 6+ years of experience as a mixed signal IP designer
Posting language: English
Posted: Sep 25, 2026

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Applications open in a new tab.

Original job description

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The IP program Manager will be part of Central Engineering’s program management team responsible for the IP development and delivery for Marvell’s products and custom silicon businesses, giving the opportunity to contribute to the successes of numerous Marvell programs.

What You Can Expect

The successful candidate will understand the SoC IP needs and develop plans to deliver and support the IP from conception through to program Mass Production Release (MPR). The successful candidate will have both depth and breadth in the related IP engineering that involve cross functional organizations, in the forms of analog, logic, design for test, layout, timing, validation, PnR, etc. Good understanding of technologies and IP development process and methodology are required. Excellent interpersonal skills and communication skills are a must.

Overall responsibility for program management of IP development & delivery to Marvell product business units
Drive closure of IP specs & requirements
Demonstrated strong cross-functional leadership to chair weekly cross functional meetings assessing status, milestones, and completeness of plans with regular program updates to Marvell Executive stakeholders
Support Marvell’s Program Management Process
Matrixed leadership of engineering program managers distributed across the engineering organization
Execute lesson's learned, risk management, and enforce agreed to processes
Responsibility for the successful outcome of IP development & delivery

What We're Looking For

BS in Electrical Engineering and MSEE preferred
Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience, OR Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5 -10 years of experience.
6+ years of experience as an Engineering Project Manager in the Semiconductor industry preferred
6+ years of experience as a mixed signal IP designer
Knowledge of SoC/IC design flow for advanced process technologies and process flows and methodologies in Silicon Development
Excellent verbal and written communication and presentation skills
Demonstrated ability to partner with technical managers to drive projects to completion
Demonstrated effective partnerships and relationships with key stakeholders
Excellent leadership skills
Must have a broad background in ASIC or other Microelectronics development

Expected Base Pay Range (USD)

173,280 - 259,600, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.

Additional Compensation And Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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More about this job

Responsibilities

Manage IP development and delivery for product and custom silicon programs from conception through Mass Production Release, including driving closure of IP specifications and requirements. Lead cross-functional planning and status reviews, coordinate engineering program managers, report progress to executive stakeholders, and manage risks, lessons learned, and process adherence.

Requirements

Requires a bachelor's degree in Computer Science, Electrical Engineering, or a related field with 10–15 years of experience, or a master's degree and/or PhD with 5–10 years of experience; a master's degree in Electrical Engineering is preferred. Candidates should bring semiconductor engineering project management and mixed-signal IP design experience, broad ASIC or microelectronics development knowledge, familiarity with advanced-process SoC/IC design flows, and strong communication and leadership skills.

Skills

IP Program Management
Engineering Project Management
Semiconductor Development
SoC and IC Design
Mixed-Signal IP Design
ASIC Development
Cross-Functional Leadership
Program Planning
Requirements Management
Risk Management
Stakeholder Management
Design for Test
Timing
Validation
Place and Route
Executive Communication

Benefits

Bonus Plan
Equity Plan
New Hire Equity Grant
Annual Equity Refreshers
Employee Stock Purchase Plan
Family Support Programs
Mental Health Resources
Recognition and Service Awards

Visa sponsorship

Not detected in the job text

Keywords

Central Engineering
IP Development
IP Delivery
Custom Silicon
Product Business Units
Mass Production Release
SoC
ASIC
IC Design
Mixed-Signal IP
Analog Design
Logic Design
Design for Test
Layout
Timing
Validation
Place and Route
Advanced Process Technologies
Silicon Development
Program Management Process
Cross-Functional Meetings
Milestone Tracking
Risk Management
Lessons Learned
Engineering Program Management
Semiconductor Manufacturing

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