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Added 10 hours ago
AM
IOHUB Design Verification Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
Experience with complex IP, ASIC, or SoC design verification. Direct experience with IP/SoC development, processors such as CPUs or GPUs, or industry bus standards such as PCIe or HT is…
Added 10 hours ago
AM
RTL Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
We are seeking a highly motivated RTL IP Design Engineer to join AMD's Security IP (SECIP) Design team. The team is responsible for the architecture, design, and verification of a broad…
Added 10 hours ago
AM
Senior ASIC RTL Design Engineer, AI Networking IP
Advanced Micro Devices, Inc
Ottawa, ON
- Full-time
We are looking for a talented ASIC RTL Design Engineer to join our IP design team developing high-performance networking and communications IP for advanced AMD products. Our intellectual…
Added 15 hours ago
A
Senior ASIC RTL Design Engineer, AI Networking IP
AMD
Ottawa, ON · Kanata, ON
- $128,000 to $192,000 USD / year
- Full-time
We are looking for a talented ASIC RTL Design Engineer to join our IP design team developing high-performance networking and communications IP for advanced AMD products. Our intellectual…
Added 15 hours ago
Q
ASIC/FPGA Design Verification Engineer, Senior
Qualcomm
Ottawa, ON
- Full-time
Senior ASIC/FPGA Design Verification Engineer
Added 15 hours ago
Q
IC/FPGA Design Verification Engineer, Sr Staff
Qualcomm
Ottawa, ON
- Full-time
Senior Staff ASIC/FPGA Design Verification Engineer
Added 21 hours ago
A
IOHUB Design Verification Engineer
AMD
Markham, ON
- $128,000 to $192,000 USD / year
- Full-time
Experience with complex IP, ASIC, or SoC design verification. Direct experience with IP/SoC development, processors such as CPUs or GPUs, or industry bus standards such as PCIe or HT is…
Added 2 days ago
AM
Principal ASIC Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
The IOHUB team at AMD is seeking a Principal ASIC Design Engineer to provide technical leadership for the development of next-generation IP that enables AMD products across server, data…
Added 4 days ago
MC
Senior ASIC Verification Engineer (35885)
Myticas Consulting
Ottawa, ON · Kanata, ON
- Full-time
Work as an independent contributor in the development and verification of advanced SoCs based on the latest ASIC and FPGA technologies. The role involves developing robust verification…
Added 5 days ago
T®
Circuit Design Engineer - Senior
TekWissen ®
Vaughan, ON
- $55 to $57 CAD / hour
- Contract
Experience with ASIC EDA tools used in synthesis, place and route, simulation, static timing analysis, test insertion, and formal verification.
Added 7 days ago
C
Senior Physical Design Engineer
Ciena
Ottawa, ON
- Full-time
…and success in the telecommunications industry. As a Digital ASIC Physical Implementation Engineer, you will play a critical role in developing large mixed-signal SoC ASICs targeting…
Added 9 days ago
ASIC Digital Design, Principal Engineer-18731
Synopsys
Mississauga, ON
You are an experienced ASIC Verification Engineer with a strong track record of delivering high-quality mixed-signal IP products, especially high-speed SerDes-based PHYs. You bring deep…
Added 9 days ago
Project Engineering Management, Principal Engineer
Synopsys
Mississauga, ON
…self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to…
Added 9 days ago
H
Staff Systems Engineer, Signal Processing/SAR Processor for Fastwater Staffing and Recruiting
HIKINEX
Remote, Canada
- Contract
- Remote
Our client is hiring a Staff-level engineer to lead a highly specialized team building cutting-edge, high-throughput signal processing systems that turn raw satellite radar data into SAR…
Added 9 days ago
AM
Sr. Physical Design Engineer, Place & Route Lead
Advanced Micro Devices, Inc
Markham, ON
- Full-time
…high-performance computing products on advanced process technologies. As a Senior Physical Design Engineer, you will lead physical implementation activities for complex designs, driving…
Added 9 days ago
A
Sr. Physical Design Engineer, Place & Route Lead
AMD
Markham, ON
- $155,200 to $232,800 USD / year
- Full-time
…high-performance computing products on advanced process technologies. As a Senior Physical Design Engineer, you will lead physical implementation activities for complex designs, driving…
Added 9 days ago
DT
Senior Design Verification Engineer
Diligent Tec, Inc
Vancouver, BC
- Contract
We are looking for a Design Verification Engineer with strong experience in ASIC/SoC verification to develop and execute verification environments and ensure high-quality digital designs.
Added 10 days ago
C
Senior ASIC Verification Engineer, onsite Kanata
Ciena
Ottawa, ON
- $109,000 to $174,000 CAD / year
- Full-time
…strengthen our team, we are looking for a hardworking digital verification engineer who will be involved in the verification of these products, working within a team of digital design…
Added 11 days ago
Senior ASIC (Front End) Design Engineer
Ethernovia, Inc.
Toronto, ON
As a Senior ASIC (Front End) Design Engineer, you will be responsible for all aspects of digital SoC design, from micro-architecture specification, RTL, verification, synthesis, lint, CDC,…
Added 15 days ago
C
Senior FPGA Verification Engineer
Ciena
Ottawa, ON
- Full-time
Experience: 8+ years of experience as an FPGA/ASIC verification engineer.
Added 17 days ago
SI
ASIC Digital Design, Principal Engineer-18731
Synopsys Inc
Mississauga, ON
- Full-time
You are an experienced ASIC Verification Engineer with a strong track record of delivering high-quality mixed-signal IP products, especially high-speed SerDes-based PHYs. You bring deep…
Added 17 days ago
C
Senior Physical Design Engineer
Ciena
Ottawa, ON
- Full-time
…and success in the telecommunications industry. As a Digital ASIC Physical Implementation Engineer, you will play a critical role in developing large mixed-signal SoC ASICs targeting…
Added 18 days ago
Q
GPU Compiler Engineer - Multiple Levels
Qualcomm
Markham, ON
- Full-time
…create a smarter, connected future for all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm…
Added 22 days ago
AM
RTL Design Engineer
Advanced Micro Devices, Inc
Markham, ON
- Full-time
As a RTL Design Engineer on the T&E NBIO/PCIe Subsystem team, you will help bring cutting-edge silicon designs to life. You will contribute to RTL and IP logic design while collaborating…
Added 1 month ago
T
Senior Specialist UT Systems Engineer
Telesat
Ottawa, ON · Greater Ottawa Metropolitan Area
- Full-time
The Senior Specialist User Terminal Systems Engineer will provide technical expertise in the development of equipment, software and systems related to the development of LEO Lightspeed user…

Microchip Technology Inc.

Senior Engineer II - Physical Design

Burnaby, BC, Canada
Canada - Burnaby, Canada

The annual base salary range for this position is $86,000-$186000.* · Full-time

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Job details

Pay: The annual base salary range for this position is $86,000-$186000.*
Job type: Full-time
Experience: This position requires at least 4-year degree in Electrical or Electronics Engineering with 7.5+ years of ASIC development experience in a fast paced environment.
Posting language: English
Posted: Sep 16, 2026

Original job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Microchip is currently looking for a Senior Physical Design Engineer to join our Implementation team in our Burnaby BC office. As a key member of Microchip's Implementation team, the successful candidate will execute chip development methodologies which include block level place and route, physical design verification, macro level test structures, digital wrapper development for analog cells, synthesis, static timing for high-performance devices. The successful candidate will also work closely with our customers to support them through Microchip's Chip development flow, and work with other groups across disciplines (CAD, Packaging, Mixed Signal, Operations, and Design) to ensure the Chip is successfully completed. Our team uses state-of-the-art tools and flows to build large and complex SOCs/ASICs.

Requirements/Qualifications:

This position requires at least 4-year degree in Electrical or Electronics Engineering with 7.5+ years of ASIC development experience in a fast paced environment.

Design, Synthesis, Static Timing and Place & Route experience in high performance design (high speed / low power) is a must. Advanced knowledge of semi-custom design & implementation tools
Hands-on experience in all aspects of physical design flows such as floorplanning, placement optimization, clock tree synthesis and physical verification
Recent experience with leading full chip Physical Design activities
Implement chip level, subsystem, CPU, and mixed signal blocks.
Excellent analytical and debugging skills and the ability to proactively solve issues.
Ability to guide others based on changing priorities
Proven ability to thrive on, learn and adapt to new methodologies and technologies
Must be able to work autonomously, but ensure to inform management of current status.
Be able to understand Verilog and VHDL languages
Excellent oral and written communications skills.
Experience with 6nm process or lower a plus
Proficiency in Python/PERL/TCL scripting is essential
Self-motivated team player that can collaborate with multiple teams across a geographically diverse company to achieve desired design goals is crucial

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position is $86,000-$186000.*

*Range is dependent on numerous factors including job location, skills and experience.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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More about this job

Responsibilities

The successful candidate will execute chip development methodologies including block-level place and route, physical design verification, and static timing analysis. They will also collaborate across multidisciplinary teams to ensure the successful completion of complex SOCs and ASICs.

Requirements

This position requires a bachelor degree in Electrical or Electronics Engineering and over 7.5 years of ASIC development experience. Candidates must possess advanced knowledge of semi-custom design tools and proficiency in scripting languages like Python, Perl, or TCL.

Skills

Asic development
Physical design
Place and route
Synthesis
Static timing analysis
Floorplanning
Placement optimization
Clock tree synthesis
Physical verification
Verilog
VHDL
Python
Perl
Tcl
Soc design
Debugging

Benefits

Restricted stock units
Quarterly bonus payments
Health benefits
Retirement savings plans
IESPP program

Visa sponsorship

Not detected in the job text

Keywords

Asic
Soc
Physical design
Synthesis
Static timing
Place and route
Floorplanning
Clock tree synthesis
Verilog
VHDL
Python
Perl
Tcl
6nm process
Mixed signal
Implementation
Semiconductor
Debugging
Chip development
Hardware engineering

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