Full-time jobs in Canada

Explore full-time jobs across Canada. Choose a location and read the full job details.

309,132 listings · 43,256 employers Counted Oct 28, 2026. How we count

About these jobs

Employers hiring include Walmart Canada (7,220 listings), Walmart (2,398 listings), Loblaw Companies Limited (2,355 listings).

Common roles: Cook, Project manager, Sales representative.

57,738 of these listings include employer-provided pay. Open a job to see its currency and pay period.

Advertised starting pay
Pay period	Median starting pay	Listings
CAD / hour	24.00	34,579
CAD / year	80,000.00	19,372
USD / year	96,800.00	1,379
USD / hour	20.00	573
CAD / month	5,027.00	527
CAD / week	1,445.00	49
CAD / day	360.00	34
GBP / year	40,000.00	13
USD / month	4,000.00	13
USD / week	1,817.65	12
EUR / year	65,000.00	11

Employer-listed minimums from at least 10 listings per currency and pay period. These are advertised starting amounts, not employee salaries. Jobs without a minimum and unusual amounts are excluded.

Workplace classifications: 2% remote, 16% hybrid, 82% on-site, 0% not specified. Hybrid and on-site classifications may be inferred from descriptions. Check the original ad.

Based on the dated count above. Listings can change. How we count

Full-time jobs in Canada

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Added 6 hours ago
CS
Manager, Strategic Initiatives - Energy Systems Standards (Petroleum & Natural Gas / Nuclear)
Canadian Standards Association
Calgary, AB
- $116,230 to $152,555 CAD / year
- Full-time
Added 6 hours ago
CS
Senior Systems Analyst, Help Desk Manager & End Point Support
Canadian Standards Association
Toronto, ON
- Full-time
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CS
Senior Director, Taxation & Treasury
Canadian Standards Association
Toronto, ON
- Full-time
Added 6 hours ago
CS
Manager, Supply Chain Operations and Analytics
Canadian Standards Association
Toronto, ON
- $100,890 to $132,416 CAD / year
- Full-time
Added 7 hours ago
PT
Accounts Receivable Specialist
Paladin Technologies
Vancouver, BC
- Full-time
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FI
Social Media Manager
Fourway Immigration Services Inc
Mississauga, ON
- Full-time
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IW
Senior Analyst Finance
IG Wealth Management
MB · Manitoba, Canada
- Full-time
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Service Billing
Paladin Technologies
Toronto, ON
- Full-time
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CO
Utility Operator II
City of Fort Saskatchewan
Fort Saskatchewan, AB
- Full-time
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Utility Operator III
City of Fort Saskatchewan
Fort Saskatchewan, AB
- Full-time
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IG Wealth Management
ON · Ontario, Canada
- Full-time
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General Repair Technician II
BGIS
Gatineau, QC
- Full-time
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(CAN) OMNI Customer Fulfillment Associate
Walmart Canada
Stettler, AB
- Full-time
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AB · Edmonton, AB
- Full-time
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Compass Early Learning and Care
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- Full-time
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Shoppers Drug Mart
Abbotsford, BC
- Full-time
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Compass Early Learning and Care
Peterborough, ON · Administration office
- Full-time
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Walmart
Taber, AB
- Full-time
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(CAN) Préposé au déchargement
Walmart
Shawinigan, QC
- Full-time
Added 7 hours ago
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(CAN) Leader d’équipe, traitement des commandes numériques
Walmart
Pointe-Claire, QC
- Full-time
Added 7 hours ago
BB
Accounts Receivable Specialist
Bosch Building Technologies
Vancouver, BC
- $47,000 to $55,000 CAD / year
- Full-time
Added 7 hours ago
Automation Project Manager
Spartan Controls Ltd.
Burnaby, BC
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- Full-time
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B
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- Full-time

Mirafra Technologies

CAD Engineer- LEC

Canada

Full-time

Apply About employer

Applications open in a new tab.

Job details

Job type: Full-time
Experience: 5+ years of hands-on experience in ASIC CAD, Formal Verification, or Physical Design implementation flows.
Posting language: English
Posted: Oct 27, 2026

Original job description

Position Overview

We are seeking an experienced LEC / Formal Verification CAD Engineer to join our Central CAD & Physical Design Methodology team. In this role, you will be responsible for defining, developing, and maintaining state-of-the-art Formal Equivalence Checking flows across RTL-to-Gate, Gate-to-Gate, and Post-ECO implementation phases. You will work closely with RTL Design, Logic Synthesis, Physical Design, and Low-Power (UPF/CPF) teams to debug complex non-equivalences, optimize verification runtimes, and ensure 100% functional equivalence before mask generation.

Key Responsibilities

Flow & Methodology Development:
Setup, automate, and maintain enterprise-level Logic Equivalence Checking (LEC) flows across all ASIC implementation stages (RTL vs. Synthesized Netlist, Pre-CTS vs. Post-CTS, Post-Route vs. ECO Netlists).
Integrate power-aware formal verification checks incorporating UPF (Unified Power Format) / CPF (Common Power Format) for multi-voltage and low-power domains.
Debug & Issue Resolution:
Root-cause complex non-equivalence issues arising from synthesis optimizations, retiming, clock gating, boundary optimizations, and scan-chain reordering.
Debug unmapped points, abort points, and key-point mapping failures in large hierarchical designs.
Validate functional correctness of manual and automated Engineering Change Orders (ECOs) (both pre-mask and metal ECOs).
CAD & Tool Enablement:
Evaluate, benchmark, and deploy industry-standard EDA tools (Cadence Conformal EC, Synopsys Formality).
Write Tcl, Python, and Perl scripts to automate flow execution, report generation, and automated debug triage.
Collaborate directly with EDA tool vendors to resolve tool bugs, file RAEs/CRs, and drive feature enhancements.
Cross-Functional Collaboration:
Support front-end RTL, Synthesis, and Physical Design engineers during signoff reviews.
Establish signoff criteria and quality metrics for tape-out readiness.

Qualifications & Requirements

Education & Experience:

B.Tech / M.Tech / M.S. in Electrical Engineering, Electronics & Communication, Computer Engineering, or a related VLSI domain.
5+ years of hands-on experience in ASIC CAD, Formal Verification, or Physical Design implementation flows.

Technical Expertise:

EDA Tools: Expertise in Cadence Conformal EC (LEC/LP) or Synopsys Formality.
Languages: Deep knowledge of Verilog, SystemVerilog, and structural netlist syntax.
Low-Power Verification: Hands-on experience with UPF / CPF side-file verification (isolation cells, level shifters, power switches).
Scripting: Proficient in Tcl, Python, Perl, and Shell scripting for CAD automation.
Synthesis & Implementation Knowledge: Strong understanding of logic synthesis concepts (Design Compiler / Genus), DFT insertion, clock tree synthesis (CTS), and place & route (P&R) optimizations.

Apply About employer

More about this job

Responsibilities

Develop, automate, and maintain formal equivalence checking flows across ASIC implementation stages, including power-aware verification and ECO validation. Debug complex equivalence issues, optimize verification runtimes, enable EDA tools and scripts, and collaborate with design teams and vendors to support signoff and tape-out readiness.

Requirements

Requires a B.Tech, M.Tech, or M.S. in electrical engineering, electronics and communication, computer engineering, or a related VLSI field, plus at least five years of relevant experience. Candidates should have expertise in Conformal EC or Formality, Verilog/SystemVerilog, UPF/CPF, scripting, and ASIC synthesis and implementation flows.

Skills

Formal Equivalence Checking
Cadence Conformal EC
Synopsys Formality
Verilog
SystemVerilog
UPF/CPF Verification
Tcl
Python
Perl
Shell Scripting
Logic Synthesis
DFT Insertion
Clock Tree Synthesis
Place and Route
ECO Validation
ASIC CAD Automation

Visa sponsorship

Not detected in the job text

Keywords

Logic Equivalence Checking
Formal Verification
ASIC
RTL-to-Gate
Gate-to-Gate
Post-ECO
Cadence Conformal EC
Synopsys Formality
UPF
CPF
Verilog
SystemVerilog
Tcl
Python
Perl
Shell Scripting
Logic Synthesis
Design Compiler
Genus
DFT Insertion
Clock Tree Synthesis
Place and Route
Engineering Change Orders
Low-Power Verification
Multi-Voltage Domains
Tape-Out Signoff
EDA Tools
VLSI
Physical Design

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