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Added 11 mins ago
DC
Coordinator, Construction Services (Electrical)
Defence Construction Canada
Happy Valley-Goose Bay, NL
- Full-time
Are you an electrical engineer? Join our team in Goose Bay and contribute to the delivery of essential infrastructure projects!
Added 11 mins ago
A
Electrical / Hardware Engineer
Actalent
Montreal, QC
- $35 to $45 CAD / hour
- Contract
Added 11 mins ago
OV
Assistant Chief Engineer | Part-Time | TD Coliseum
Oak View Group
Hamilton, ON
- $45 to $50 CAD / hour
- Part-time
Added 11 mins ago
C
Automation Engineer
Cytiva
Burnaby, BC
- Full-time
Added 11 mins ago
BC
Candidate to the engineering profession–Designer, Controls, Substations and Power Plants
BBA Consultants
Mont-Saint-Hilaire, QC · Mont-St-Hilaire, QC
- Full-time
Join BBA and put your experience to work by taking an active role in all project stages as a design engineer (CEP) in controls. You’ll help design control and protection systems for…
Added 11 mins ago
4th Class Stationary Engineer, Data Centre Operations
Bell
Merritt, BC
Added 26 mins ago
S
Firmware Engineer
Solidigm
Vancouver, BC
- Full-time
Added 41 mins ago
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Reclamation Manager - Central Canada
Glencore
Sudbury, ON · Greater Sudbury, ON
- Full-time
Added 1 hour ago
Engineering Study Manager - PL#44559
Peter Lucas Project Management Inc.
Kamloops, BC
Added 1 hour ago
AC
Test Engineer
Amaris Consulting | Part of Mantu
ON · Ontario, Canada
- Full-time
We are seeking a Test Engineer – P&C Relay to execute factory and site testing, configuration, and commissioning of protection and control systems and multi-function protective relays…
Added 1 hour ago
PL
Engineering Study Manager - PL#44559
Peter Lucas
Kamloops, BC
- Full-time
Added 1 hour ago
KS
Engineering Manager - Industrial Automation & Power Systems
Kinetic Search Group
Vancouver, BC · Greater Vancouver Metropolitan Area
- $170,000 to $190,000 CAD / year
- Full-time
Our client is an established Canadian leader in engineered industrial automation, electrical power systems, and advanced motor control solutions. Serving some of North America's most…
Added 1 hour ago
S
Firmware Engineer
Solidigm
Vancouver, BC
- $116,480 to $174,800 CAD / year
- Full-time
Added 1 hour ago
AG
Senior Mill Projects Engineer
Artemis Gold - Blackwater Project
BC
- Other
Added 1 hour ago
TI
Project Engineer (Laval)
Trane Italia
Laval, QC · Longueuil, QC
- Full-time
Added 1 hour ago
BG
Electrical Engineer
Brandt Group of Companies
Zehner
- Full-time
The Electrical Engineer is responsible for the design and coordinating of Electrical Engineering works associated with the construction of new buildings and renovation projects for the…
Added 1 hour ago
BG
Senior Civil Engineer
Brandt Group of Companies
Zehner
- Full-time
Added 1 hour ago
BG
Lead Civil Engineer
Brandt Group of Companies
Zehner
- Full-time
Brandt Developments has a Lead Civil Engineer position available at our Regina, Saskatchewan location. This position is responsible for the design and approval of Civil Engineering works…
Added 1 hour ago
Senior Maintenance & Reliability Engineer
Steel Reef Infrastructure Corporation
Calgary, AB
Added 1 hour ago
DC
Intermediate Electrical Designer/Engineer
Danaher Corporation
Concord, ON · CAN - Concord - AB Sciex LP
- $90,000 to $103,000 CAD / year
- Full-time
Added 1 hour ago
DC
Senior Electrical Engineer/Designer
Danaher Corporation
Concord, ON · CAN - Concord - AB Sciex LP
- $111,333 to $122,500 CAD / year
- Full-time
Added 1 hour ago
Outside Sales Engineer – Heat Trace, Western Canada
Spirax-Sarco Ltd.
Canada
Composed of Chromalox, Durex Industries, Vulcanic, and Thermocoax businesses, Electrical Thermal Solutions (ETS), part of Spirax Group, creates electrical process heating and temperature…
Added 2 hours ago
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Electronic Reliability Engineer Co-op (Winter 2027)
Ciena
Ottawa, ON
- Full-time
Added 2 hours ago
Project Engineer - Hybrid Power & Electrification
Hatch
Vancouver, BC
Added 2 hours ago
R
Ingénieur analyste - Systèmes de contrôle / Engineer, Analyst - Control Systems
RTX
Longueuil, QC
- Full-time

Mirafra Technologies

CAD Engineer- LEC

Canada

Full-time

Apply About employer

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Job details

Job type: Full-time
Experience: 5+ years of hands-on experience in ASIC CAD, Formal Verification, or Physical Design implementation flows.
Posting language: English
Posted: Oct 27, 2026

Original job description

Position Overview

We are seeking an experienced LEC / Formal Verification CAD Engineer to join our Central CAD & Physical Design Methodology team. In this role, you will be responsible for defining, developing, and maintaining state-of-the-art Formal Equivalence Checking flows across RTL-to-Gate, Gate-to-Gate, and Post-ECO implementation phases. You will work closely with RTL Design, Logic Synthesis, Physical Design, and Low-Power (UPF/CPF) teams to debug complex non-equivalences, optimize verification runtimes, and ensure 100% functional equivalence before mask generation.

Key Responsibilities

Flow & Methodology Development:
Setup, automate, and maintain enterprise-level Logic Equivalence Checking (LEC) flows across all ASIC implementation stages (RTL vs. Synthesized Netlist, Pre-CTS vs. Post-CTS, Post-Route vs. ECO Netlists).
Integrate power-aware formal verification checks incorporating UPF (Unified Power Format) / CPF (Common Power Format) for multi-voltage and low-power domains.
Debug & Issue Resolution:
Root-cause complex non-equivalence issues arising from synthesis optimizations, retiming, clock gating, boundary optimizations, and scan-chain reordering.
Debug unmapped points, abort points, and key-point mapping failures in large hierarchical designs.
Validate functional correctness of manual and automated Engineering Change Orders (ECOs) (both pre-mask and metal ECOs).
CAD & Tool Enablement:
Evaluate, benchmark, and deploy industry-standard EDA tools (Cadence Conformal EC, Synopsys Formality).
Write Tcl, Python, and Perl scripts to automate flow execution, report generation, and automated debug triage.
Collaborate directly with EDA tool vendors to resolve tool bugs, file RAEs/CRs, and drive feature enhancements.
Cross-Functional Collaboration:
Support front-end RTL, Synthesis, and Physical Design engineers during signoff reviews.
Establish signoff criteria and quality metrics for tape-out readiness.

Qualifications & Requirements

Education & Experience:

B.Tech / M.Tech / M.S. in Electrical Engineering, Electronics & Communication, Computer Engineering, or a related VLSI domain.
5+ years of hands-on experience in ASIC CAD, Formal Verification, or Physical Design implementation flows.

Technical Expertise:

EDA Tools: Expertise in Cadence Conformal EC (LEC/LP) or Synopsys Formality.
Languages: Deep knowledge of Verilog, SystemVerilog, and structural netlist syntax.
Low-Power Verification: Hands-on experience with UPF / CPF side-file verification (isolation cells, level shifters, power switches).
Scripting: Proficient in Tcl, Python, Perl, and Shell scripting for CAD automation.
Synthesis & Implementation Knowledge: Strong understanding of logic synthesis concepts (Design Compiler / Genus), DFT insertion, clock tree synthesis (CTS), and place & route (P&R) optimizations.

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More about this job

Responsibilities

Develop, automate, and maintain formal equivalence checking flows across ASIC implementation stages, including power-aware verification and ECO validation. Debug complex equivalence issues, optimize verification runtimes, enable EDA tools and scripts, and collaborate with design teams and vendors to support signoff and tape-out readiness.

Requirements

Requires a B.Tech, M.Tech, or M.S. in electrical engineering, electronics and communication, computer engineering, or a related VLSI field, plus at least five years of relevant experience. Candidates should have expertise in Conformal EC or Formality, Verilog/SystemVerilog, UPF/CPF, scripting, and ASIC synthesis and implementation flows.

Skills

Formal Equivalence Checking
Cadence Conformal EC
Synopsys Formality
Verilog
SystemVerilog
UPF/CPF Verification
Tcl
Python
Perl
Shell Scripting
Logic Synthesis
DFT Insertion
Clock Tree Synthesis
Place and Route
ECO Validation
ASIC CAD Automation

Visa sponsorship

Not detected in the job text

Keywords

Logic Equivalence Checking
Formal Verification
ASIC
RTL-to-Gate
Gate-to-Gate
Post-ECO
Cadence Conformal EC
Synopsys Formality
UPF
CPF
Verilog
SystemVerilog
Tcl
Python
Perl
Shell Scripting
Logic Synthesis
Design Compiler
Genus
DFT Insertion
Clock Tree Synthesis
Place and Route
Engineering Change Orders
Low-Power Verification
Multi-Voltage Domains
Tape-Out Signoff
EDA Tools
VLSI
Physical Design

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