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Added 24 mins ago
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Myticas Consulting

FPGA Design & Validation Engineer – 4G 5G Radio (35952)

Ottawa, ON, Canada

Job type: Contract
Apply by: Oct 30, 2026
Posting language: English
Posted: Sep 30, 2026

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Original job description

FPGA Design & Validation Engineer – 4G/5G Radio Units

Location: Kanata, Ottawa, Ontario - Innovation Drive

Work Arrangement: Minimum 3 days onsite per week required; no exceptions

Contract Term: 12 months, with a potential additional 12-month extension

Hours: 8 hours per day

Start Date: ASAP

About The Role

We are seeking an FPGA Design Engineer to support the design, development, verification and validation of 4G/5G Radio Units (RUs), with a focus on the datapath.

You will develop FPGA IP architecture, implement complex RTL blocks and validate integrated systems. The role requires strong knowledge of wireless signal processing, radio architecture and high-speed interfaces, along with the ability to solve complex technical problems independently and guide engineering teams.

Key Responsibilities

FPGA Design and Architecture

Develop FPGA IP architecture for 4G/5G Radio Units.
Contribute to system-level designs aligned with 3GPP and O-RAN Alliance specifications.
Define system requirements and functional specifications with limited direction.
Evaluate design approaches, industry trends and competing solutions to inform product development and long-term technical planning.

RTL Development and Implementation

Develop complex RTL blocks using Verilog, SystemVerilog or VHDL and integrate them into larger systems.
Optimize FPGA resource utilization and achieve timing closure.
Establish technical standards and make design, component and supplier choices that support performance and product cost targets.
Contribute technical research and evaluations to project plans, budgets, new products and product updates.

Verification and Validation

Define and execute verification plans using UVM and advanced verification techniques.
Perform simulations and system-level FPGA validation.
Identify and resolve complex design, integration and validation issues.

Collaboration and Technical Leadership

Collaborate with Radio Unit development teams to support system integration.
Work with software engineers to ensure hardware-software interoperability.
Provide technical guidance, mentor junior engineers and participate in design reviews.
Lead technical work on critical projects and communicate progress, risks and recommendations to senior management.
Incorporate customer input and help resolve internal and external technical issues.

Required Qualifications

Proven experience in FPGA design and RTL development.
Expertise in NR, LTE, eCPRI, CPRI and PTP protocols, along with signal processing.
Strong understanding of 4G/5G Radio architecture and the O-RAN ecosystem.
Familiarity with JESD204B/C, Ethernet, PCIe, AXI and high-speed SERDES.
Experience with Quartus, Vivado, MATLAB/Simulink and HDL Coder.
Knowledge of UVM and verification methodologies.
Experience with Git/GitHub and version control workflows.
Ability to work independently, solve complex engineering problems and provide technical leadership.

Preferred Qualifications

7+ years of FPGA design experience in wireless or high-speed systems.
Experience developing high-volume wireless products and FPGA IP.
Contributions to standards bodies or technical forums, including O-RAN and 3GPP.

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More about this job

Responsibilities

Design FPGA IP architecture and develop complex RTL blocks for 4G/5G Radio Units, optimizing resource use and timing while aligning with 3GPP and O-RAN specifications. Plan and execute verification and system validation, resolve integration issues, collaborate across hardware and software teams, and provide technical leadership.

Requirements

Requires proven FPGA and RTL design experience, expertise in wireless protocols and signal processing, and a strong understanding of 4G/5G radio architecture and O-RAN. Candidates should also have experience with FPGA development and verification tools, high-speed interfaces, version control, and independent technical problem-solving; 7+ years of relevant experience is preferred.

Skills

FPGA Design
RTL Development
Verilog
SystemVerilog
VHDL
Wireless Signal Processing
4G/5G Radio Architecture
O-RAN
LTE
NR
eCPRI
CPRI
UVM
JESD204B/C
High-Speed SERDES
Timing Closure

Visa sponsorship

Not detected in the job text

Keywords

FPGA
RTL
Verilog
SystemVerilog
VHDL
4G
5G
Radio Units
3GPP
O-RAN Alliance
NR
LTE
eCPRI
CPRI
PTP
Signal Processing
JESD204B/C
Ethernet
PCIe
AXI
SERDES
Quartus
Vivado
MATLAB/Simulink
HDL Coder
UVM
Git
GitHub
System Integration
Timing Closure

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