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Added 14 mins ago
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Principal Electrical Engineer
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- Full-time
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Principal Piping Engineer
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EC
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Toronto, ON
- Full-time
Eaton’s Electrical sector is currently seeking a Technical Product Specialist to join our team. This hybrid position is based at our Toronto, ON facility and offers benefits from day one.
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- Full-time
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- $9,599.75 to $14,385.5 CAD / month
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Program Chief Engineer – Spacecraft / Satellite Systems
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- Full-time
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Digital Sales Engineer / Market Development Manager-Automation-Flygt
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Seeking an experienced Mechanical Engineer to provide onsite engineering support for the development of advanced hardware platforms and optical communication products. The consultant will…
Added 3 hours ago
MC
Senior ASIC Verification Engineer (35885)
Myticas Consulting
Ottawa, ON · Kanata, ON
- Full-time
Added 3 hours ago
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SC
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Toronto, ON
- $65,000 to $85,000 CAD / year
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Added 3 hours ago
FC
Principal Process Engineer - Power Projects
Fluor Corporation
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MC
Coherent Optical Systems Engineer (35886)
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Ottawa, ON · Kanata, ON
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Myticas Consulting

Senior ASIC Verification Engineer (35885)

Ottawa, ON, Canada
Kanata, ON, Canada

Full-time

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Job details

Job type: Full-time
Apply by: Dec 4, 2026
Experience: 8+ years of relevant experience in ASIC or SoC verification.
Posting language: English
Posted: Nov 4, 2026

Original job description

Senior ASIC Verification Engineer

Role Overview

Work as an independent contributor in the development and verification of advanced SoCs based on the latest ASIC and FPGA technologies. The role involves developing robust verification environments, creating test strategies, and collaborating with cross-functional engineering teams to deliver high-quality silicon and hardware solutions.

Key Responsibilities

Develop and verify complex SoCs and digital ASIC designs using SystemVerilog and UVM.
Develop protocol and traffic generators, checkers, and self-checking verification environments.
Develop and execute comprehensive test plans based on functional requirements and applicable industry standards.
Define, develop, and execute verification tests for complex digital ASICs at the block and sub-chip levels.
Collaborate with hardware, software, system engineers, suppliers, and other technical teams to resolve complex technical issues.
Work closely with subject matter experts across different engineering disciplines to develop competitive and reliable solutions.
Support hardware and software bring-up, integration, debugging, and issue resolution.
Apply functional coverage, code coverage, assertions, and formal verification techniques to improve verification quality.
Contribute independently to assigned projects or provide technical leadership to a verification team when required.
Help evaluate and implement evolving verification methodologies, tools, and best practices.

Skills And Experience

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline; Master's degree is preferred.
8+ years of relevant experience in ASIC or SoC verification.
Strong experience developing and implementing verification test plans for complex ASICs at the block or sub-chip level.
Advanced proficiency in SystemVerilog and scripting languages such as Python.
Strong knowledge and hands-on experience with the UVM methodology.
Experience with SystemVerilog Assertions (SVA) and functional coverage.
Experience with code coverage and formal verification tools.
Understanding of modern and evolving ASIC/SoC verification methodologies.
Strong analytical and problem-solving skills.
Excellent communication and collaboration skills.
Ability to work effectively within geographically distributed, cross-functional engineering teams.
Experience with DSP and/or FEC is considered an asset.

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More about this job

Responsibilities

Develop and verify complex SoCs and digital ASICs using SystemVerilog and UVM, including verification environments, test plans, generators, checkers, coverage, assertions, and formal techniques. Collaborate with cross-functional teams to resolve technical issues, support bring-up and integration, and contribute independently or provide technical leadership.

Requirements

A bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline is required, with a master's degree preferred, along with 8 or more years of relevant ASIC or SoC verification experience. Candidates should have advanced SystemVerilog and Python skills, strong UVM experience, and hands-on knowledge of assertions, coverage, and formal verification; DSP or FEC experience is an asset.

Skills

SystemVerilog
UVM
ASIC Verification
SoC Verification
Verification Test Planning
Python
SystemVerilog Assertions
Functional Coverage
Code Coverage
Formal Verification
Protocol and Traffic Generators
Debugging
Hardware and Software Integration
DSP
FEC
Cross-Functional Collaboration

Visa sponsorship

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Keywords

ASIC
SoC
FPGA
SystemVerilog
UVM
Python
Digital Design
ASIC Verification
SoC Verification
Verification Environment
Verification Test Plan
Functional Requirements
Industry Standards
Protocol Generators
Traffic Generators
Checkers
Self-Checking Verification
Block-Level Verification
Sub-Chip Verification
SystemVerilog Assertions
Functional Coverage
Code Coverage
Formal Verification
Hardware Bring-Up
Software Bring-Up
Integration
Debugging
DSP
FEC
Verification Methodologies

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