Senior Digital/FPGA Engineer

Toronto, ON, Canada

Full-time

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Job details

Job type: Full-time
Apply by: Apr 12, 2027
Posting language: English
Posted: Oct 14, 2026

Original job description

We are looking for an engineer to help us build Software Defined Radios (SDRs) for mission critical infrastructure. Our products use FPGAs to provide a high performance interface between data provided over a high speed bus (10/40/100G Ethernet), our internal IP, and high speed converter (DACs/ADCs) devices. Your primary responsibilities require you to design, simulate, implement, and validate, FPGA based architectures that interface with high speed IOs (ADC, DAC, clock) to effectively process that data (filtering, decimating, interpolating), and pass that data over a high speed busses (JESD204B/C, 10/40/100G Ethernet). This position also requires engineers to effectively document and communicate design changes, updates, challenges, to other engineers and a broader team.

Mandatory Qualifications

Experience in all of the following areas:

Experience with Verilog (preferred) or VHDL
High speed (>150MHz) digital designs.
Digital Test bench creation, simulation, and maintenance
Experience with Linux based distributions
Working knowledge of C or C++

Minimum Experience

Experience directly implementing and debugging in at least three of the following areas:

High speed DSP (ex; Filters, Decimators, Interpolators, etc.) design (>150MHz)
High speed IO interfaces (ex; 10G/40G/100G Ethernet, PCIe, USB3, etc.) designs (>300MHz)
High speed (>325MSPS) Digital and Analog Converter Interfaces (JESD204B/C, LVDS, etc.)
Low latency digital modem design (QPSK/QAM/PAM, etc)
DDR3/4 Memory Controllers (>1800MT/s)
Complex test bench creation using iverilog or verilator
Timing closure for large (>90% utilization), complex (>5 clock domains), designs
FPGA integration with SoC devices, external chipsets, processors, and/or microcontrollers

Optional Qualifications

The following skills are desired but not necessarily required for the position:

Intel/Altera EDA tooling (Quartus, etc).
FPGA integration with SDR systems
Ethernet protocol implementations (ie; VITA-49 over UDP)
Working in a Linux computing environment.
Using version control systems (ie; git)
Previous design or manufacturing experience
Previous work with Schematic Capture and PCB Layout
Linux Kernel driver or API Development
Understanding of wireless radio and DSP chains
Mixed signal board layout and schematic capture
Open source radio projects (ie; OpenBTS, UHD, Yocto)

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More about this job

Responsibilities

Design, simulate, implement, and validate FPGA architectures that interface with high-speed ADCs, DACs, and clocks to process data through filtering, decimation, and interpolation. Transfer data across high-speed buses and document and communicate design changes, updates, and challenges to engineers and the broader team.

Requirements

Requires experience with Verilog or VHDL, high-speed digital designs, digital test bench creation and simulation, Linux distributions, and working knowledge of C or C++. Candidates must have directly implemented and debugged at least three specified areas, such as high-speed DSP, high-speed interfaces, converter interfaces, modem design, memory controllers, timing closure, or FPGA integration.

Skills

Verilog
VHDL
FPGA Design
High-Speed Digital Design
Digital Test Bench Development
Simulation and Validation
Linux
C/C++
Digital Signal Processing
High-Speed I/O Interfaces
JESD204B/C
Ethernet
Digital and Analog Converter Interfaces
Digital Modem Design
DDR3/DDR4 Memory Controllers
Timing Closure

Visa sponsorship

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Keywords

Software Defined Radio
FPGA
Verilog
VHDL
C
C++
Linux
Digital Signal Processing
Filtering
Decimation
Interpolation
ADC
DAC
JESD204B/C
10/40/100G Ethernet
PCIe
USB 3
QPSK
QAM
PAM
DDR3/DDR4
Icarus Verilog
Verilator
Quartus
VITA-49
UDP
Git
Linux Kernel Drivers
Mixed-Signal Board Design
Yocto

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