Closed listing
Hardware Architect
- Ottawa, ON, Canada
Contract
This opening has closed.
The original listing is kept below for reference.
Job details
- Job type
- Contract
- Closing date
- Experience
- 7+ years of FPGA design experience in wireless or high-speed systems.
- Posting language
- English
- Posted
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Search current openingsOriginal job description
Archived listing. The details below describe a past opening.
Hardware Architect
Ottawa ,ON (Onsite)
Contract
What You’ll Do
Design & Architecture:
- Develop FPGA IP architecture for 4G/5G Radio Units.
- Contribute to system-level design aligned with 3GPP and O-RAN Alliance specifications.
Implementation:
- Implement complex RTL blocks (Verilog/SystemVerilog/VHDL) and integrate into larger systems.
- Optimize FPGA resource utilization and ensure timing closure.
Validation & Testing:
- Define and execute verification plans using UVM and advanced techniques.
- Perform simulation and system-level FPGA validation.
Collaboration:
- Work closely with Radio Unit development teams for seamless integration.
- Partner with software teams to ensure hardware-software interoperability.
- Mentor junior engineers and participate in technical reviews.
Essential Requirements:
- Proven experience in FPGA design and RTL development.
- Expertise in NR/LTE/eCPRI/CPRI/PTP protocols and signal processing.
- Familiarity with JESD204B/C, Ethernet, PCIe, AXI, and high-speed SERDES.
- Tools: Quartus, Vivado, MATLAB/Simulink, HDL Coder.
- Knowledge of UVM and verification methodologies.
- Strong understanding of 4G/5G Radio architecture and O-RAN ecosystem.
- Experience with Git/GitHub and version control workflows.
Desirable Skills:
- 7+ years of FPGA design experience in wireless or high-speed systems.
- Experience in high-volume wireless products and IP development.
- Contributions to standards bodies or technical forums (O-RAN, 3GPP).
More about this job
Responsibilities
Design FPGA IP architecture and implement complex RTL for 4G/5G Radio Units, including optimizing FPGA resources and achieving timing closure. Develop and execute verification and validation plans, integrate hardware with radio and software teams, and mentor junior engineers.
Requirements
Requires proven FPGA and RTL design experience, knowledge of wireless protocols, signal processing, high-speed interfaces, and 4G/5G Radio and O-RAN architecture. Candidates should be familiar with Quartus, Vivado, MATLAB/Simulink, HDL Coder, UVM, and Git; seven or more years of relevant experience is desirable.
Skills
- FPGA Design
- RTL Development
- Verilog
- SystemVerilog
- VHDL
- UVM
- 4G/5G Radio Architecture
- O-RAN
- NR/LTE
- eCPRI/CPRI
- PTP
- Signal Processing
- JESD204B/C
- Ethernet
- PCIe
- AXI
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Software
Keywords
- FPGA
- RTL
- Verilog
- SystemVerilog
- VHDL
- 4G
- 5G
- Radio Units
- 3GPP
- O-RAN Alliance
- NR
- LTE
- eCPRI
- CPRI
- PTP
- Signal Processing
- JESD204B/C
- Ethernet
- PCIe
- AXI
- SERDES
- Quartus
- Vivado
- MATLAB/Simulink
- HDL Coder
- UVM
- FPGA Validation
- Git
- GitHub
- IP Development