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Qualcomm

Senior ASIC Verification Engineer

Markham, ON, Canada

Pay: $108,000.00 - $158,000.00
Job type: Full-time
Posting language: English
Posted: Sep 21, 2026

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Original job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

What we are doing has not been done.

Shape the future of low power AI subsystems.

Push the boundaries on features and performance.

Qualcomm Technologies Low Power Audio/AI products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IP's, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.

As we pioneer new and/or improved functionality, we innovate to minimize power consumption.

Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum. New Position

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

We are looking for an ASIC Verification Engineer to be part of our team to innovate and design complex leading, ultra-low power, solutions for audio and context aware applications.

As part of our team your responsibilities will be focused on key ASIC verification tasks such as:

Contribute to core verification during the pre/post silicon phase of next generation ASICs through simulation
Drive test plan development, execution and verification closure in conjunction with the design and verification teams
Contribute to creating/maintaining a test bench, assertions, and functional coverage models with scalability and reuse as key goals
Contribute to implementing flows to automate development processes. Identify areas for improvement and drive them to completion
Lead complex debug activities through the development cycle (pre and post-silicon)
Provide technical supervision to other engineers and have the ability to lead by example
Work closely with design to define verification methodology, Provide test plans and develop required tests.

Specific responsibilities will be a function of project and team needs and may vary over time.

Requirements:

3+ years ASIC design, verification, implementation or related work experience
Proficiency with Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
Solid understanding of ASIC/VLSI concepts
Hardware verification languages (HVL): SystemVerilog testbench (UVM), and/or SystemC,
Hardware description languages (HDL): Verilog and/or SystemVerilog
Good working experience with C (basic level or C++ sufficient)

Preferred Qualifications:

Knowledge in one or more of the following disciplines is preferred: Audio (MP3, MIDI, etc.), Bus/interconnect (AHB, AXI), CPU (ARM v8/v7, Cache, MMU, security, etc.).
Strong knowledge of digital circuits and event-driven simulators
Knowledge of Perl, tcsh, Python and GNU Make is a strong asset
Experience with automotive safety concepts and standards such as ISO26262

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

Pay range and Other Compensation & Benefits:

$108,000.00 - $158,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers.

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More about this job

Responsibilities

Contribute to core verification during pre and post-silicon phases of next-generation ASICs through simulation and test plan execution. Lead complex debug activities and provide technical supervision to other engineers while collaborating with design teams on verification methodology.

Requirements

Requires a Bachelor's degree in Engineering or related field with at least 3 years of relevant ASIC experience. Proficiency in Verilog/VHDL, SystemVerilog (UVM), and basic C/C++ is essential for this role.

Skills

ASIC verification
SystemVerilog
UVM
Verilog
VHDL
C++
RTL design
Functional coverage
Test plan development
Debug
Python
Perl
AHB
AXI
Digital circuits

Benefits

Annual discretionary bonus program
Annual RSU grants
Competitive benefits package

Visa sponsorship

Not detected in the job text

Keywords

ASIC
Verification
SystemVerilog
UVM
RTL
Verilog
VHDL
SystemC
C++
Python
Perl
AHB
AXI
ARM
ISO26262
Simulation
Debugging
Low power
Audio
SoC
VLSI
Functional coverage
Testbench
Hardware description language
Hardware verification language

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