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Added 3 months ago
P
Concepteur/Conceptrice Photonique & Technologies quantiques (Montréal) H/F
Pasqal
Montreal, QC
- $80,000 to $100,000 CAD / year
- Full-time
Analyze data and test results from fabricated components and optimize design robustness for high-volume production.
Added 3 months ago
LC
System Analyst, AI
Linamar Corporation
Guelph, ON
- Full-time
Post-secondary Education in Computer Science, Engineering, Data Science, or another related discipline
Added 3 months ago
P
Concepteur/Conceptrice Photonique & Technologies quantiques (Montréal) H/F
Pasqal
Montreal, QC
- $80,000 to $100,000 CAD / year
- Full-time
Analyze data and test results from fabricated components and optimize design robustness for high-volume production.
Added 2 months ago
Senior Software Developer, Manufacturing Data Solutions (Python/SQL)
Sonova AG
Kitchener, ON
Strong experience with data engineering technologies, including ETL pipelines, Python, SQL, and relational databases
Added 3 months ago
GS
Software Engineer (Python) - PricingCenter
Guidewire Software
Toronto, ON · Mississauga, ON
- Full-time
…collaborative, hybrid environment, pairing closely with product, UX, and data teams to deliver secure, reliable services at scale. Our stack centers on Python, modern web APIs, and…
Added 3 months ago
MS
Senior Java/Scala Developer - Risk Infrastructure (Hybrid)
Morgan Stanley
Montreal, QC
- Full-time
We’re seeking a Senior Java/Scala Developer to join the Optimus SDLC team and lead the evolution of Optimus within the broader Codetree ecosystem, which supports Morgan Stanley’s Fixed…
Added 2 months ago
XS
Spécialiste GNSS / GNSS Specialist
Xona Space Systems
Montreal, QC
- Full-time
Expérience de l'analyse théorique des performances des systèmes GNSS dans différents environnements à l'aide de Python, C, C++ ou MATLAB.
Added 3 months ago
MS
Senior Security Engineer - Pentester
Menlo Security
Remote, Canada
- Full-time
- Remote
…government agencies, to protect their most valuable asset, their data, and is backed by top-tier…
Added 3 months ago
A
FPGA Compiler (Placer) Engineer
Altera
Toronto, ON
- Full-time
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Added 3 months ago
R
SMTS Logic Design
Rambus
Montreal, QC
- Other
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Senior Member of Technical Staff (SMTS) – Logic Design Engineer to join our…
Added 2 months ago
A
Senior Hardware Engineer
Adtran
Ottawa, ON
- Full-time
…pluggable optical transceiver modules for metro, core, and data center applications. The successful candidate will have proven competency in high-speed electronic design, signal integrity…
Added 4 months ago
I
Senior Data Engineer
iQmetrix
Regina, Saskatchewan
- Full-time
A core part of the mission is reducing friction across the data lifecycle: onboarding, modeling, governance, exposure, and application. That means building high-quality lakehouse pipelines,…
Added 4 months ago
S
AI Platform Engineer – DevOps
Synechron
Halifax, Nova Scotia
- $85,000 to $100,000 CAD / year
- Full-time
…Artificial Intelligence, Consulting, Digital, Cloud & DevOps, Data, and Software Engineering, servicing an array of noteworthy financial services and technology firms. Through research and…
Added 4 months ago
FS
Solutions Architect
Future Secure AI
Toronto, Ontario
- Full-time
Lead solution design across cloud infrastructure, application services, data flows, and integrations
Added 4 months ago
S
Senior Solution Engineer/Sr. DevOps Engineer
Synechron
Halifax, Nova Scotia
- $85,000 to $95,000 CAD / year
- Full-time
…Artificial Intelligence, Consulting, Digital, Cloud & DevOps, Data, and Software Engineering, servicing an array of noteworthy financial services and technology firms. Through research and…
Added 4 months ago
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Coherent Systems Architect - Mixed Signal AFE development
Nokia
Kanata, Ontario
- Full-time
Solid automation skills in Python including data pipelines and plotting.
Added 4 months ago
C
Senior QA Data Quality Engineer
Cognizant
Halifax, Nova Scotia
- Full-time
As a Senior QA Data Quality Engineer, you will lead quality assurance initiatives and collaborate with cross-functional technology teams to ensure the delivery of scalable, high-performance…
Added 4 months ago
I
Senior Data Engineer
iQmetrix
Winnipeg, Manitoba
- Full-time
A core part of the mission is reducing friction across the data lifecycle: onboarding, modeling, governance, exposure, and application. That means building high-quality lakehouse pipelines,…
Added 4 months ago
I
Senior Data Engineer
iQmetrix
Vancouver, British Columbia
- Full-time
A core part of the mission is reducing friction across the data lifecycle: onboarding, modeling, governance, exposure, and application. That means building high-quality lakehouse pipelines,…
Added 4 months ago
I
Senior Data Engineer
iQmetrix
Toronto, Ontario
- Full-time
A core part of the mission is reducing friction across the data lifecycle: onboarding, modeling, governance, exposure, and application. That means building high-quality lakehouse pipelines,…
Added 4 months ago
B
Senior Data Engineer
BrainStation
Toronto, Ontario
- $120,000 to $145,000 CAD / year
- Full-time
Bachelor’s degree or higher in Computer Science, Data Engineering, Information Technology, or a related field.
Added 4 months ago
AS
Associate Software Engineer / Software Engineer
Applied Systems Canada
Toronto, Ontario
- Full-time
Epic Engineering is building robust, scalable software solutions as we continue to improve system quality, accelerate delivery, and ensure maintainability across the ecosystem. We’re hiring…
Added 4 months ago
NE
Junior Settlements Data Analyst
Nexus Energy Inc.
Toronto, Ontario
- $60,000 to $70,000 CAD / year
- Full-time
Strong working knowledge of SQL for data extraction, querying, and analysis; experience with Python, VBA, Power BI, and database systems is considered an asset. Experience supporting…
Added 3 months ago
C
Senior / Staff Software Engineer – Core Data Infrastructure
Calliere
Toronto, ON
- Full-time
We are representing a well-capitalized, fast-growing B2B technology company that builds high-volume data aggregation platforms. Their infrastructure ingests massive streams of sensor and…
Added 2 months ago
DevOps Engineer - Halifax Canada
NTT DATA Services
Halifax, NS
NTT DATA strives to hire exceptional, innovative and passionate individuals who want to grow with us. If you want to be part of an inclusive, adaptable, and forward-thinking organization,…

Rambus

SMTS Logic Design

450 Rue St-Pierre Street, Suite 300, Montreal, QC, H2Y 2M8, Canada

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Job details

Apply by: Aug 3, 2027
Experience: 8+ years of ASIC/SoC logic design experience with proven delivery of complex silicon products from architecture through tape-out.
Posting language: English
Posted: Aug 3, 2026

Original job description

Overview

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Senior Member of Technical Staff (SMTS) – Logic Design Engineer to join our PCIe Switch Architecture and Design team in Montreal, Canada. In this role, you will be working with some of the brightest inventors and engineers in the world developing next-generation PCIe Gen6/Gen7 switch products that make data faster and safer.

As a Senior Member of Technical Staff (SMTS) – Logic Design Engineer, you’ll play a pivotal role in PCIe Gen6/Gen7 switch IP development, contributing to architecture definition, micro-architecture development, RTL implementation, and design closure of high-performance ASIC IP. In this full-time role, you’ll report directly to the Logic Design leadership team. Our PCIe Switch Architecture and Design team is dedicated to developing scalable, high-performance switch IP for advanced connectivity solutions, and your contributions will be instrumental in delivering next-generation PCIe switch product milestones.

Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities

The successful candidate will contribute across the full product lifecycle, from architecture and micro-architecture through RTL implementation, verification support, emulation, and design closure.

Analyze product requirements and contribute to architecture and micro-architecture development for next-generation PCIe Gen6/Gen7 switch products.
Define and document complex hardware subsystems, including PCIe switch fabric, port controllers, routing and arbitration logic, flow control and credit management, buffer management, power management features, and configuration/register infrastructure.
Review specifications and identify implementation risks, performance bottlenecks, scalability concerns, and opportunities for design optimization.
Develop high-quality, synthesizable RTL using SystemVerilog and design high-performance pipelines capable of supporting PCIe Gen6 and Gen7 data rates.
Implement timing-conscious and physically-aware architectures suitable for advanced process nodes, ensuring RTL is scalable, reusable, and maintainable.
Lead the development of significant design blocks independently and drive resolution of complex technical issues spanning architecture, implementation, and verification.
Mentor junior and intermediate engineers, participate in design reviews, and provide technical guidance across the team.
Collaborate with verification engineers to define verification strategies, coverage goals, and debug approaches.
Support block, subsystem, emulation, FPGA, and silicon debug activities, including analysis of protocol, performance, and functional issues discovered during verification or customer engagements.
Conduct RTL reviews, enforce coding guidelines, and support CDC, RDC, lint, synthesis, and timing closure activities.
Participate in continuous improvement of design methodologies, automation flows, and development processes.

Qualifications

Candidates should demonstrate strong ASIC/SoC logic design experience, technical leadership, and the ability to deliver complex silicon IP from architecture through tape-out.

BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related discipline.
8+ years of ASIC/SoC logic design experience with proven delivery of complex silicon products from architecture through tape-out.
Expert knowledge of SystemVerilog, RTL design methodologies, and ASIC development flows.
Strong understanding of pipelined architectures, resource arbitration, state machine design, clock-domain crossing (CDC), reset-domain crossing (RDC), and low-power design techniques.
Experience with synthesis and timing closure, including industry-standard EDA tools such as Synopsys Design Compiler/Fusion Compiler, Cadence Genus, SpyGlass, and Questa/Visualizer.
Preferred: deep knowledge of PCIe Gen5/Gen6/Gen7 protocol architecture and experience designing PCIe switches, root complexes, PCIe endpoints, or high-speed interconnect fabrics.
Preferred: familiarity with CXL, PTM, ATS/PASID/PRI, SR-IOV, and PCIe power management features.
Preferred: experience with emulation platforms such as HAPS, Palladium, or Veloce, and experience with performance modeling or architectural simulation in Python or C++.
Strong problem-solving, analytical, communication, documentation, mentoring, and technical leadership skills, with the ability to work effectively across architecture, verification, software, and customer-facing teams.

About Rambus

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.

At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.

For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/.

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More about this job

Responsibilities

The candidate will contribute to the full product lifecycle of PCIe Gen6/Gen7 switch IP, including architecture definition, RTL implementation, and design closure. They will also mentor junior engineers and collaborate with verification teams to ensure high-performance silicon delivery.

Requirements

Candidates must have 8+ years of ASIC/SoC logic design experience and a degree in Electrical or Computer Engineering. Expert knowledge of SystemVerilog, RTL methodologies, and industry-standard EDA tools is required for this role.

Skills

Logic Design
PCIe Gen6/Gen7
SystemVerilog
RTL Implementation
ASIC/SoC Design
Timing Closure
Synthesis
Pipelined Architectures
Clock-domain crossing
Reset-domain crossing
Low-power design
Technical leadership
Verification support
Emulation
Silicon debug

Benefits

Bonus
Equity
Employee benefits

Visa sponsorship

Not detected in the job text

Keywords

ASIC
SoC
Logic Design
PCIe
SystemVerilog
RTL
Synthesis
Timing Closure
Synopsys Design Compiler
Cadence Genus
SpyGlass
CXL
Emulation
HAPS
Palladium
Veloce
Silicon IP
Data Center Connectivity
Semiconductor
Architecture
Micro-architecture
CDC
RDC
Python
C++
SR-IOV
High-speed interconnect

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