Full-time jobs in Canada (378,822 jobs)

Explore full-time jobs across Canada. Choose a location and read the full job details.

378,822 listings · 47,234 employers Counted Nov 9, 2026. How we count

About these jobs

Employers hiring include Walmart Canada (9,048 listings), Health Match BC (3,925 listings), Walmart (2,916 listings).

Common roles: Project manager, Sales representative, Cook.

66,671 of these listings include employer-provided pay. Open a job to see its currency and pay period.

Advertised starting pay
Pay period	Median starting pay	Listings
CAD / hour	24.00	39,023
CAD / year	80,000.00	25,319
CAD / month	5,317.00	693
USD / year	127,000.00	223
CAD / week	1,530.00	77
CAD / day	360.00	44
USD / hour	22.00	28
GBP / year	40,000.00	13
EUR / year	68,000.00	11
USD / month	4,000.00	11

Employer-listed minimums from at least 10 listings per currency and pay period. These are advertised starting amounts, not employee salaries. Jobs without a minimum and unusual amounts are excluded.

Workplace classifications: 1% remote, 16% hybrid, 82% on-site, 0% not specified. Hybrid and on-site classifications may be inferred from descriptions. Check the original ad.

Based on the dated count above. Listings can change. How we count

Full-time jobs in Canada

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SPARK Microsystems

Senior Digital ASIC Designer

Montreal, QC, Canada

Full-time

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Applications open in a new tab.

Job details

Job type: Full-time
Apply by: Dec 9, 2026
Experience: 8+ years of experience in digital ASIC circuit design including 4+ years in a senior position.
Posting language: English
Posted: Nov 9, 2026

Original job description

About the Company

SPARK Microsystems offers a unique and innovative UWB wireless chips transmitter-receiver technology that delivers energy efficiency and latency of an order of magnitude better than the state of the art. Our goal is to significantly extend the battery life of electronic systems that require short-range wireless communications, as well as increase the robustness and agility of their wireless connections. If you are dynamic, motivated, and ready to have a fulfilling and thrilling professional experience in a unique start-up, we want to talk to you!

About the Role

You will be working on the next generation wireless ASICs and SoCs that are used in range of SPARK Microsystems products such as mice, audio headsets, speakers, proximity detection, ranging and the IoT. You will be responsible for leading the design and implementation of complex digital circuits within Application Specific Integrated Circuits (ASICs), including architecture definition, RTL coding, synthesis, timing analysis, and close collaboration with verification and physical design teams to ensure the functionality, performance, and power efficiency of the chip, often taking ownership of critical design blocks or subsystems within a larger ASIC project. This position reports to the Director of ASIC Development.

Responsibilities

Participate in defining the overall architecture of the ASIC, including key functional blocks, data paths, and interfaces, considering performance, area, and power constraints.
Develop high-quality RTL code in languages like Verilog, SystemVerilog or VHDL for complex digital circuits, ensuring code readability, maintainability, and adherence to design specifications.
Perform synthesis to translate RTL code into a netlist, then conduct comprehensive static timing analysis (STA) to identify and resolve timing critical paths, optimizing for performance and power.
Collaborate closely with the verification team, providing design documentation, testbench support, and debugging assistance to ensure thorough functional validation of the design.
Provide technical guidance to the digital designer and ensure quality standards are met throughout the design process.
Implement power-aware design techniques to minimize power consumption within the ASIC, considering clock gating, power domains, and leakage reduction strategies.
Work closely with the physical design team to provide design constraints, review layout, and address any layout-related issues impacting functionality and timing.
Take ownership of specific design blocks or subsystems within the ASIC project, managing timelines, deliverables, and communicating progress to stakeholders.
Participate in design reviews.
Take a leadership role in the digital validation of the ASIC.
Mentor and transfer knowledge to other team members.

Qualifications

Bachelor’s or Master’s in Electrical Engineering or equivalent.
8+ years of experience in digital ASIC circuit design including 4+ years in a senior position.

Required Skills

Deep understanding of digital logic design principles, including combinational and sequential circuits, state machines, and clock domain crossing.
Proficiency in RTL coding using Verilog, SystemVerilog or VHDL, including advanced features like parameterized design and assertions.
Extensive experience with synthesis tools and timing analysis methodologies to optimize design for performance and power.
Excellent communication and collaboration skills to work effectively with cross-functional teams.

Preferred Skills

Familiarity with design for testability (DFT) techniques to ensure comprehensive chip validation.
Familiarity with the complete ASIC design flow, including RTL coding, synthesis, place and route, timing analysis, and post-silicon validation.
Experience using Python for doing scripts.
Experience with AMBA bus interconnect.
Lab experience with common lab equipment, including protocol/logic analyzers, and oscilloscopes for debugging and validating integrated circuits.
Expertise in using digital simulation, synthesis and STA EDA tools.
Ability to troubleshoot complex design issues, identify root causes, and propose effective solutions.

Equal Opportunity Statement

SPARK Microsystems is committed to providing an inclusive workplace and equal employment opportunities. We welcome qualified applicants and provide accommodations throughout the recruitment process upon request.

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More about this job

Responsibilities

Lead the architecture, RTL design, synthesis, timing analysis, and power optimization of complex digital ASIC blocks and subsystems. Coordinate with verification and physical design teams, lead digital validation, manage design deliverables, and mentor other team members.

Requirements

Requires a bachelor’s or master’s degree in Electrical Engineering or an equivalent field, at least 8 years of digital ASIC design experience, and at least 4 years in a senior position. Candidates should have strong RTL, synthesis, and timing analysis expertise, with preferred experience in DFT, the full ASIC flow, Python scripting, AMBA, and lab debugging equipment.

Skills

Digital ASIC Design
ASIC Architecture
RTL Coding
Verilog
SystemVerilog
VHDL
Synthesis
Static Timing Analysis
Digital Logic Design
Clock Domain Crossing
Power-Aware Design
Design for Testability
AMBA Bus Interconnect
Python Scripting
Digital Validation
Technical Leadership

Visa sponsorship

Not detected in the job text

Keywords

Digital ASIC
Wireless ASIC
System-on-Chip
ASIC Architecture
RTL
Verilog
SystemVerilog
VHDL
Synthesis
Static Timing Analysis
Clock Domain Crossing
Power-Aware Design
Clock Gating
Power Domains
Leakage Reduction
Design for Testability
Place and Route
Post-Silicon Validation
Python
AMBA
Digital Simulation
EDA Tools
Protocol Analyzer
Logic Analyzer
Oscilloscope
Digital Validation
UWB Wireless
Semiconductor Manufacturing

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