Principal Analog/Mixed-Signal IC Design Engineer
- Vancouver, BC, Canada
Full-time
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Job details
- Job type
- Full-time
- Apply by
- Working hours
- 40 hours per week
- Posting language
- English
- Posted
Original job description
COMPANY INFORMATION
Stathera is a semiconductor company delivering performance-leading MEMS timing and frequency reference solutions for the semiconductor industry. Headquartered in Montreal, with offices in Toronto and Boston, our team specializes in MEMS timing products that offer disruptive advantages over quartz-based timing. We are also passionate about saving time and reducing system costs for our customers. Our first-to-the-world true dual-output (kHz and MHz) MEMS oscillator replaces two quartz-based oscillators. This simplifies system design and enables miniaturization, BOM reduction, lower current consumption and lower cost across applications including wearables, IoT and smartphones.
INTRODUCTION TO ROLE
Stathera is looking for a Principal Analog/Mixed-Signal IC Design Engineer to join our team in Vancouver, British Columbia, Canada. This is a hybrid role, combining time in the office with remote work. We encourage individuals who combine technical expertise, leadership acumen and a strong drive for innovation to apply.
The successful candidate will have an MS with 12+ years of relevant experience, or a Ph.D. with 8+ years of industry experience designing analog and mixed-signal circuits, including technical leadership of full-chip programs through production. The Principal Analog/Mixed-Signal IC Design Engineer will report directly to the Director of ASIC and will be expected to work a total of 40 hours per week.
RESPONSIBILITIES AND DUTIES
- Lead the architecture and design of a full ASIC from scratch, from specification through tape-out and production
- Own the top-level analog/mixed-signal architecture and block-level specifications, and drive key design trade-offs across power, performance, area and cost
- Provide technical leadership and mentorship to analog/mixed-signal engineers, including leading design reviews and setting design best practices
- Define the required tests and verification methodology, and sign off on design readiness for tape-out
- Guide pre- and post-layout circuit debug to achieve the required performance
- Lead post-silicon characterization, debug and ASIC/MEMS integration
- Collaborate closely with MEMS, digital, layout, test and product teams, as well as foundry and EDA partners
REQUIRED SKILLS
- Analog-oriented circuit designer with a proven track record of leading full-chip designs through multiple successful tape-outs
- Deep knowledge of and hands-on design experience with analog circuits such as bandgaps, regulators, data converters, clock generators, PLLs and switched-capacitor circuits
- Strong understanding of signal processing concepts, both continuous and discrete time
- Expert proficiency with schematic capture tools such as Cadence Virtuoso or Synopsys Custom Compiler, and SPICE-based simulators such as Spectre, HSPICE or AFS
- Extensive knowledge of design flow, testing methodology, block-level specifications, calibration and compensation
- Strong command of layout design concepts (parasitic effects, symmetry, regularity and matching, gradient and proximity effects, reliability)
- Demonstrated ability to lead and mentor engineers, influence technical direction and communicate clearly with cross-functional stakeholders
DESIRED SKILLS
- Experience with scripting languages (Shell, Perl, Python, Tcl)
- Experience with analog circuit modeling in Verilog or Verilog-A
- Experience with MATLAB and Simulink
- Experience with MEMS timing devices, oscillators or low-power sensor interface circuits
- Experience building or scaling a design team in a start-up or early-stage environment
BENEFITS
At Stathera, we value the well-being and success of our exceptional employees. We offer a comprehensive benefits package that includes:
- Health coverage: Sun Life group insurance plan covering you and your family, 100% paid by Stathera
- Wellness: $500 annual health and wellness allowance
- Ownership: Employee Stock Ownership Plan (ESOP)
- Office perks: Complimentary coffee and snacks
- Time off: Vacation days, personal days and a full December holiday closure
We invite you to apply to join our supportive and innovative team, where your well-being and professional growth are top of mind.
EQUAL OPPORTUNITY
Stathera is an equal opportunity employer. We are committed to a work environment based on mutual respect, hard work and inclusion, without bias or discrimination. Our team includes people from all backgrounds and walks of life, and each member is valued for what they know and what they can contribute. Together we keep learning, push our boundaries and treat mistakes as chances to grow. Those who do will have the opportunity to grow with us and share in our success. Accommodations are available on request for candidates taking part in all aspects of the selection process.
More about this job
Responsibilities
Lead the architecture and design of full ASICs from specification through tape-out and production, including top-level analog/mixed-signal architecture, block specifications, verification, and design readiness. Provide technical leadership and mentorship, guide circuit debug and post-silicon characterization, and coordinate ASIC/MEMS integration with cross-functional teams and external partners.
Requirements
Requires an MS with 12+ years of relevant experience or a PhD with 8+ years of industry experience, including technical leadership of full-chip programs through production. Candidates need deep hands-on analog and mixed-signal design expertise, proficiency with schematic and SPICE tools, strong knowledge of design, testing, layout, calibration, and verification flows, and demonstrated leadership and communication skills.
Skills
- Analog And Mixed-Signal IC Design
- Full-Chip ASIC Design
- Analog Circuit Design
- Bandgaps And Regulators
- Data Converters
- Clock Generators And PLLs
- Switched-Capacitor Circuits
- Signal Processing
- Cadence Virtuoso
- Synopsys Custom Compiler
- SPICE Simulation
- Design Verification And Testing
- Calibration And Compensation
- Layout Design And Parasitic Analysis
- Post-Silicon Characterization And Debug
- Technical Leadership And Mentorship
Benefits
- Health Coverage
- Health And Wellness Allowance
- Employee Stock Ownership Plan
- Complimentary Coffee And Snacks
- Vacation Days
- Personal Days
- December Holiday Closure
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Management & Leadership
- Manufacturing
Keywords
- Analog And Mixed-Signal IC Design
- ASIC
- Full-Chip Architecture
- Tape-Out
- Production
- Bandgaps
- Regulators
- Data Converters
- Clock Generators
- PLL
- Switched-Capacitor Circuits
- Continuous-Time Signal Processing
- Discrete-Time Signal Processing
- Cadence Virtuoso
- Synopsys Custom Compiler
- Spectre
- HSPICE
- AFS
- Verilog
- Verilog-A
- MATLAB
- Simulink
- Shell
- Perl
- Python
- Tcl
- MEMS Timing Devices
- Oscillators
- Post-Silicon Characterization
- ASIC/MEMS Integration