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Added 2 mins ago
BH
Senior Field Manager (Thermal Plant) - Campbell River
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Campbell River, BC
- $131,100 to $165,800 CAD / year
- Full-time
Deliver on overall business objectives for the facility, including budgetary, operational, and safety performance.
Added 2 mins ago
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- $82,639 to $103,299 CAD / year
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Added 5 mins ago
RB
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- Full-time
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Added 9 mins ago
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Added 15 mins ago
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Added 31 mins ago
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Added 31 mins ago
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Added 42 mins ago
ASIC Digital Design, Principal Engineer
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Your architectural decisions will define the performance, power, and area of SerDes IP used in high-volume networking and storage products worldwide
Added 52 mins ago
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Forward Deployed Engineer – AI, Data Engineering & MLOps / Toronto, ON (Onsite) - FTE
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- Full-time
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Added 55 mins ago
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Synopsys

Pre-Silicon Signoff Lead

Mississauga, ON, Canada

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Job details

Experience: MSc or PhD in Electrical/Computer Engineering, with 10+ years of relevant industry experience.
Posting language: English
Posted: Sep 2, 2026

Original job description

General Information

Job Title

Pre-Silicon Signoff Lead

Job ID

18615

Country

Canada

City

Mississauga

State/Province

Mississauga

Date Posted

02-Sep-2026

Job Category

Engineering

Job Subcategory

R&D Engineering

Hire Type

Employee

Remote Eligible

Descriptions & Requirements

Job Description and Requirements

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned engineer with deep expertise in high-speed serial communication and transceiver design, blending theoretical rigor with hands-on laboratory proficiency. You thrive in dynamic, cross-disciplinary environments, collaborating with analog, digital, and hardware teams to realize innovative solutions. Your background includes advanced modeling, signal processing, and hardware validation, making you a pivotal contributor to projects involving PCIe and Ethernet protocols. You have a natural inclination for mentoring, guiding junior engineers, and sharing your technical wisdom. Your analytical mindset and attention to detail help you anticipate challenges and craft robust architectures. As an adaptable problem solver, you excel at troubleshooting complex systems and supporting customers through technical challenges. You are passionate about advancing connectivity technologies and are eager to lead simulation and sign-off activities that ensure best-in-class product reliability. With your strong communication skills, you foster transparency and alignment across teams, and your commitment to excellence drives Synopsys’ continued leadership in high-performance connectivity solutions. You are motivated by opportunities to innovate, empower others, and make a tangible impact on next-generation silicon products.

What You’ll Be Doing:

Collaborating closely with analog, digital, and hardware teams to ensure holistic design and verification coverage.
Developing and maintaining comprehensive simulation and verification plans for IP, aligning with reliability and performance targets.
Reviewing execution against verification plans through regular meetings with multiple verification teams (analog, cosim, DV, GLS, formal, emulation).
Establishing, monitoring, and reporting on key verification metrics such as functional, code, and assertion coverage.
Coordinating with Firmware & Algorithms Lead and Digital FW Developers to develop hardware regression plans for successive FW releases.
Delivering high-quality verification collateral including test plans, test cases, coverage reports, and sign-off documentation.

The Impact You Will Have:

Advance high-speed connectivity for enterprise and hyperscale applications worldwide.
Ensure robust and scalable solutions for a diverse global customer base.
Drive innovation in SerDes design, modeling, and validation methodologies.
Accelerate time-to-market for cutting-edge silicon products.
Empower customers by delivering expert technical support and troubleshooting.
Strengthen Synopsys’ reputation as an industry leader in high-performance connectivity IP.
Enable successful silicon implementation by catching issues early through rigorous simulation and verification.
Facilitate cross-team collaboration that enhances product quality and reliability.

What You’ll Need:

MSc or PhD in Electrical/Computer Engineering, with 10+ years of relevant industry experience.
Deep expertise in high‑speed protocols - PCIe and Ethernet.
Proficiency in SystemVerilog, object‑oriented verification, UVM/VMM/OVM, and assertion‑based verification, coverage closure expertise.
Strong scripting/programming: Python, TCL, Perl, C/C++.
In-depth knowledge of high-speed analog and digital design principles.
Familiarity with verification flows: analog, cosimulation, digital verification, GLS, formal methods, and emulation.
Proven leadership: testbench architecture, planning, cross‑site collaboration, and mentoring.

Who You Are:

Innovative and forward-thinking, always seeking new solutions to technical challenges.
Detail-oriented, with a rigorous approach to analysis and validation.
Collaborative and effective in cross-functional team settings.
Strong communicator and mentor, able to share knowledge and guide others.
Adaptable, thriving in fast-paced and evolving environments.
Customer-focused, dedicated to delivering high-quality support and solutions.

The Team You’ll Be a Part Of:

You’ll join a world-class engineering team focused on developing, verifying, and delivering industry-leading high-speed connectivity IP. Our team is a blend of domain experts in analog and digital design, modeling, and hardware validation, working collaboratively to push boundaries in SerDes and transceiver technologies. Together, we drive innovation, tackle complex challenges, and ensure our products empower customers to achieve their goals in enterprise, data center, and networking applications.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Inclusive work culture supporting diverse backgrounds and experiences.
Reasonable accommodations available throughout the recruitment and employment process.
For accommodation requests, contact hr-help-canada@synopsys.com.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.

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More about this job

Responsibilities

You will collaborate with cross-functional teams to develop and maintain comprehensive simulation and verification plans for high-speed connectivity IP. Additionally, you will monitor verification metrics and coordinate with firmware developers to ensure high-quality silicon implementation and product reliability.

Requirements

Candidates must hold an MSc or PhD in Electrical or Computer Engineering with over 10 years of relevant industry experience. Proficiency in high-speed protocols, SystemVerilog, and advanced verification methodologies is required.

Skills

High-speed serial communication
Transceiver design
PCIe
Ethernet
SystemVerilog
UVM
VMM
OVM
Python
TCL
Perl
C++
C
Signal processing
Hardware validation
Simulation

Benefits

Health benefits
Wellness benefits
Financial benefits

Visa sponsorship

Not detected in the job text

Keywords

Pre-Silicon
Signoff
SerDes
Transceiver
PCIe
Ethernet
SystemVerilog
UVM
VMM
OVM
Python
TCL
Perl
C++
C
Simulation
Verification
Hardware validation
Signal processing
Analog design
Digital design
GLS
Formal methods
Emulation
Connectivity IP
Hyperscale
Enterprise
Firmware
Algorithms
Architecture

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