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Synopsys

Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Ottawa, ON, Canada

Experience: 15+ years of semiconductor development experience with progression into engineering leadership
Posting language: English
Posted: Jul 20, 2026

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Original job description

General Information

Job Title

Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Job ID

18259

Country

Canada

City

Ottawa

State/Province

Ottawa (Hines Road)

Date Posted

20-Jul-2026

Job Category

Engineering

Job Subcategory

R&D Engineering

Hire Type

Employee

Remote Eligible

Descriptions & Requirements

Job Description and Requirements

We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent your career building and leading teams that ship advanced SerDes IP, and you understand that execution is everything. The difference between a program that delivers and one that slips is usually a decision made six months earlier, and you are the kind of leader who sees it coming and adjusts before it becomes a crisis.

Managing distributed teams across time zones does not intimidate you. You create alignment between analog designers, verification engineers, and firmware developers while keeping customer commitments front and center. When silicon bring-up hits an unexpected issue, you are the person the team calls because you cut through noise and mobilize the right people without creating panic. At Synopsys, you will lead the team building 112G and 224G Ethernet SerDes IP that powers AI infrastructure and hyperscale data centers.

What You'll Be Doing

Lead an R&D organization developing 112G/224G Ethernet SerDes and Interface PHY IP for AI/HPC, networking, and data center markets
Own execution planning, staffing, and delivery commitments across multiple concurrent programs and customer milestones
Drive technical alignment across architecture, analog, digital, verification, firmware, and customer support teams
Partner with product and program management to translate roadmap priorities into executable engineering plans
Define processes for milestone reviews, risk management, and decision-making that keep programs moving
Lead resolution of customer-critical issues from triage through root-cause analysis and corrective action
Develop engineering talent through coaching, performance management, hiring, and succession planning

The Impact You Will Have

Deliver production-quality Ethernet SerDes IP that enables customers to meet performance and time-to-market goals
Build execution discipline that consistently meets delivery commitments without burning out the team
Establish quality practices that reduce post-release issues and customer escalations
Develop future technical and managerial leaders through structured coaching
Drive methodology improvements and automation that measurably improve productivity
Shape the technical direction of next-generation SerDes platforms

What You'll Need

BS/MS/PhD in Electrical Engineering, Computer Engineering, or related discipline
15+ years of semiconductor development experience with progression into engineering leadership
Proven experience leading engineering teams with significant schedule, quality, and customer impact
Strong understanding of SerDes PHY digital development flows including architecture, RTL, verification, firmware, integration, and release
Experience with Ethernet, PCIe/CXL, or other high-speed protocols; Ethernet SerDes experience strongly preferred
Track record managing execution across distributed teams and multiple stakeholders

Who You Are

You can walk into a program review, hear five opinions on why a milestone is at risk, and synthesize the real issue in under ten minutes
When a customer escalation lands, you get into the details and own the communication until it is resolved
You know the difference between process that helps and process that slows people down, and you kill the latter
Building teams is the technical work; you spend real time on hiring, coaching, and creating growth paths
You have strong opinions but listen first and change your mind when the data says you should

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.

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More about this job

Responsibilities

Lead an R&D organization in developing 112G/224G Ethernet SerDes and Interface PHY IP for AI, HPC, and data center markets. Manage execution planning, technical alignment across cross-functional teams, and the resolution of customer-critical issues.

Requirements

Requires a BS/MS/PhD in Electrical or Computer Engineering with over 15 years of semiconductor development experience. Candidates must have a proven track record in engineering leadership, specifically with high-speed protocols and distributed team management.

Skills

SerDes IP
Ethernet
Interface PHY
R&D Leadership
Silicon Design
Analog Design
Verification
Firmware Development
112G SerDes
224G SerDes
AI Infrastructure
Data Center
Performance Management
Risk Management
Technical Coaching
High-speed Protocols

Benefits

Health benefits
Wellness benefits
Financial benefits

Visa sponsorship

Not detected in the job text

Keywords

SerDes
Ethernet
PHY
Silicon
IP
AI
HPC
Data Center
R&D
Semiconductor
PCIe
CXL
RTL
Firmware
Analog
Digital
Verification
Architecture
Engineering Leadership
Product Management
Program Management
Root-cause Analysis
Automation
Methodology
Coaching
Performance Management
Succession Planning
Networking
Hyperscale
Synopsys

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