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Added 9 mins ago
B
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- Full-time
We are looking for a Software Engineer with a strong mobile and frontend focus to help shape the primary way customers experience Bree.
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Added 24 mins ago
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ASIC/RTL Design Engineer 5
TekWissen ®
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- $89.11 to $94.06 CAD / hour
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In this role, you will be responsible for driving low-power design strategies, synthesis, and timing closure for complex SoC and IP designs.
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Verification Engineer 5
TekWissen ®
Ottawa, ON · Kanata, ON
- $88 to $90 CAD / hour
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Added 54 mins ago
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Added 54 mins ago
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Added 1 hour ago
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TekWissen ®

Verification Engineer 5

Ottawa, ON, Canada
Kanata, ON, Canada

$88 to $90 CAD / hour · Contract

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Job details

Pay: $88 to $90 CAD / hour
Job type: Contract
Apply by: Dec 3, 2026
Experience: 10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting.
Posting language: English
Posted: Nov 3, 2026

Original job description

Job Title: Verification Engineer 5

Location: OTTAWA, ON K2K 3G3

Duration: 12 Months

Job Type: Temporary Assignment

Work Type: Onsite

Pay Rate: $ 90.00- 90.00/ Hr

Overview:

TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. Global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.

Job Description:

JOB DUTIES:

Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
Be familiar with hardware modeling and/or assertion-based verification methods.

EXPERIENCE AND EDUCATION:

10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting.
Strong background in C/C++ development in a Linux Environment.
Strong debug skills and experience with debug tools such as Gdb, Valgrind.
Proficient in Object Oriented programming, STL, computer architecture and data structures.
Knowledge of Perl and Makefiles.
Experience in Verilog/SystemVerilog/SystemC, preferred.
Experience in C/Verilog environment using DPI/PLI, preferred.
Strong analytical skills and attention to detail.
Excellent written and communication skills.

TekWissen® Group is an equal opportunity employer supporting workforce diversity.

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More about this job

Responsibilities

Verify complex ASIC and IP blocks for a combined CPU/GPU development effort, collaborating with design and verification teams to validate functionality at block, chip, and system levels. Document and execute directed and constrained-random simulation tests, and apply evolving verification methodologies within existing project infrastructure.

Requirements

Requires 10+ years of verification experience on large ASIC projects or software/firmware experience in hardware development, along with strong C/C++ skills in Linux. Candidates should have debugging expertise, object-oriented programming and computer architecture knowledge, and familiarity with Perl and Makefiles; Verilog, SystemVerilog, SystemC, and DPI/PLI experience is preferred.

Skills

Functional Verification
ASIC Verification
IP Core Verification
C/C++
Linux
Debugging
GDB
Valgrind
Object-Oriented Programming
STL
Computer Architecture
Data Structures
Perl
Makefiles
Verilog
SystemVerilog

Visa sponsorship

Not detected in the job text

Keywords

Functional Verification
ASIC
IP Cores
CPU
GPU
C/C++
Linux
GDB
Valgrind
Object-Oriented Programming
STL
Computer Architecture
Data Structures
Perl
Makefiles
Verilog
SystemVerilog
SystemC
DPI/PLI
Directed Testing
Constrained-Random Testing
Simulation
Hardware Modeling
Assertion-Based Verification
SoC
Semiconductor

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