Verification Engineer 5 # 26-27787
- Ottawa, ON, Canada
$80 to $85 CAD / hour · Contract
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Job details
- Pay
- $80 to $85 CAD / hour
- Job type
- Contract
- Apply by
- Experience
- 10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting.
- Posting language
- English
- Posted
Original job description
Duration: 12 months
Job Duties
- Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
- Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip, and overall system.
- Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
- Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
- Be familiar with hardware modeling and/or assertion-based verification methods.
- 10+ years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting.
- Strong background in C/C++ development in a Linux environment.
- Strong debug skills and experience with debug tools such as Gdb and Valgrind.
- Proficient in Object Oriented Programming (OOP), STL, computer architecture, and data structures.
- Knowledge of Perl and Makefiles.
- Experience in Verilog/SystemVerilog/SystemC (preferred).
- Experience in C/Verilog environment using DPI/PLI (preferred).
- Strong analytical skills and attention to detail.
- Excellent written and communication skills.
- UVM
- System Verilog
- Understanding of C/C++ programming
- Need Design Verification, fine with FPGA Verification.
Plus/Ideal candidate:
- RISC - V experience
About US Tech Solutions:
US Tech Solutions is a global staff augmentation firm providing a wide range of talent on-demand and total workforce solutions. To know more about US Tech Solutions, please visit www.ustechsolutions.com.
US Tech Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, colour, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
AI Statement: By applying, you acknowledge that AI-assisted tools may be used during hiring.
More about this job
Responsibilities
Verify complex ASIC or IP blocks for a combined CPU/GPU development effort, collaborating with design and verification teams to validate functionality at block, chip, and system levels. Document and execute directed and constrained-random simulation tests, and apply established verification infrastructure and methodologies.
Requirements
Requires 10+ years of verification experience on large ASIC projects or relevant software/firmware experience in hardware development, along with strong C/C++ skills in Linux and expertise in debugging, OOP, STL, computer architecture, and data structures. UVM and SystemVerilog are must-have skills; Verilog/SystemC, DPI/PLI, Perl, Makefiles, and RISC-V experience are also relevant.
Skills
- UVM
- SystemVerilog
- C/C++
- Design Verification
- FPGA Verification
- ASIC Verification
- Functional Verification
- Constrained-Random Testing
- Assertion-Based Verification
- Linux
- GDB
- Valgrind
- Object-Oriented Programming
- STL
- Computer Architecture
- RISC-V
Visa sponsorship
Not detected in the job text
Categories
- Engineering
- Technology
- Software
Keywords
- ASIC
- IP Cores
- CPU
- GPU
- UVM
- SystemVerilog
- Verilog
- SystemC
- C/C++
- Linux
- GDB
- Valgrind
- STL
- Object-Oriented Programming
- Computer Architecture
- Data Structures
- Perl
- Makefiles
- DPI
- PLI
- Functional Verification
- Design Verification
- FPGA Verification
- Constrained-Random Testing
- Directed Testing
- Assertion-Based Verification
- Simulation
- RISC-V
- SoC
- Hardware Modeling