Join Our Innovative Team: Semiconductor EDA / CAD / IT Engineer
About Us
At StarIC, we’re not just building circuits; we’re shaping the future of technology. As a Toronto-based semiconductor design company, we thrive on creativity, collaboration, and pushing the boundaries of what’s possible. Our passion lies in analog and mixed signal design, where precision meets innovation.
Why StarIC?
- Exciting Projects: At StarIC, you won’t be working on mundane tasks. Instead, you’ll dive headfirst into cutting-edge projects that redefine the industry.
- Learning Culture: We believe in continuous growth. As part of our team, you’ll learn quickly and have the opportunity to teach others.
- Global Impact: Our advanced mixed-signal Integrated Circuits reach clients worldwide, making a tangible impact on technology.
- Collaboration: Co-work with layout, digital, and system teams to optimize designs and create exceptional solutions.
- Client Engagement: Discussions and presentations with clients keep us at the forefront of IC design.
Responsibilities:
- Evaluate, set up, customize, and define PDK flows.
- Implement and drive Custom Design Automation flows, including schematic entry, layout design (color aware and DPT/MPT), and parasitic extraction for transistor-level flow.
- Model devices and simulate environments using Synopsys' Custom Compiler PrimeSim XA circuit simulators.
- Apply knowledge and hands-on experience in physical verification (DRC, LVS, DFM checks).
- Conduct electrical verification such as EMIR, ERC, and PERC.
- Characterize analog cells and verify reliability.
- Interface between digital and analog/mixed signal methodologies.
- Develop custom automation flows, customize rule decks, and enhance productivity and efficiency.
- Train, deploy, and support automation flows for design teams.
- Debug flow issues and test cases from design teams for simulation, LVS, DRC, EMIR, and post-layout simulation.
- Assist with tape-outs, final chip finishing runs, and interface with foundry/customers for rulesets.
- Report to the Manager of the IP Modelling Team.
Requirements:
- Bachelor's degree in Electronic Engineering or a related field.
- 2 to 5 years of experience in a CAD Automation engineer role.
- Experience with various technology nodes (7nm, 5nm, 4nm, 3nm, etc.).
- Familiarity with different foundries (TSMC, SAMSUNG, etc.) and design techniques.
Preferred Skills:
- Strong knowledge of analog/mixed-signal design and development in Synopsys/Cadence design environments.
- Proficiency with EDA tools and methodologies in analog/mixed signal design and development.
- Experience with standards and formats such as Spice, CDL, LEF, DEF, Verilog, SPEF, GDS, OA, LIB, etc.
- Scripting skills in TCL, Python, C-Shell scripts, PERL, etc.
- Data management skills using Git, SVN, ICManage, Cliosoft, Perforce, Methodics, etc.
- Knowledge of 14nm/10nm/7nm/5nm/4nm/3nm FinFet technologies.
- Understanding of deep submicron issues/technologies (< 45 nm technology).
- Familiarity with job submission and monitoring.
- Understanding of tool license features and license administration.
